Open Access
18 December 2013 Uncooled infrared detectors toward smaller pixel pitch with newly proposed pixel structure
Shigeru Tohyama, Tokuhito Sasaki, Tsutomu Endoh, Masahiko Sano, Koji Kato, Seiji Kurashina, Masaru Miyoshi, Takao Yamazaki, Munetaka Ueno, Haruyoshi Katayama, Tadashi Imai
Author Affiliations +
Abstract
An uncooled infrared (IR) focal plane array (FPA) with 23.5 μm pixel pitch has been successfully demonstrated and has found wide commercial applications in the areas of thermography, security cameras, and other applications. One of the key issues for uncooled IRFPA technology is to shrink the pixel pitch because the size of the pixel pitch determines the overall size of the FPA, which, in turn, determines the cost of the IR camera products. This paper proposes an innovative pixel structure with a diaphragm and beams placed in different levels to realize an uncooled IRFPA with smaller pixel pitch (≦17  μm ). The upper level consists of a diaphragm with VOx bolometer and IR absorber layers, while the lower level consists of the two beams, which are designed to be placed on the adjacent pixels. The test devices of this pixel design with 12, 15, and 17 μm pitch have been fabricated on the Si read-out integrated circuit (ROIC) of quarter video graphics array (QVGA) (320×240 ) with 23.5 μm pitch. Their performances are nearly equal to those of the IRFPA with 23.5 μm pitch. For example, a noise equivalent temperature difference of 12 μm pixel is 63.1 mK for F/1 optics with the thermal time constant of 14.5 ms. Then, the proposed structure is shown to be effective for the existing IRFPA with 23.5 μm pitch because of the improvements in IR sensitivity. Furthermore, the advanced pixel structure that has the beams composed of two levels are demonstrated to be realizable.

1.

Introduction

In 2004, the authors developed a 23.5 μm pixel pitch detector that used a twice-bent beams and eaves structure as shown in Fig. 1(a)1,2. This pixel pitch was the smallest pixel size for uncooled infrared focal plane arrays (IRFPAs) at that time. This pixel structure has been used for bolometer type uncooled IRFPAs in the following VGA formats (640×480, HX3100) as shown in Fig. 1(b). This pixel technology has been then expanded into the QVGA (320×240) type IRFPA family [see Figs. 1(c) and 1(d)]. Furthermore, the QVGA type IRFPA has been applied to real-time terahertz (THz) imaging detection (see Fig. 2). The optical materials and structure of the detector were modified to improve THz responsivity. THz imaging detection is thought to be suitable for security and biochemical imaging applications. The VGA type IRFPA has also been applied to enhanced vision systems (EVS), high-end research applications such as thermography and security cameras, as well as defense use. Figure 3 shows the series of EVS (AEROEYE) for aviation safety assistance.

Fig. 1

23.5 μm pixel structure and the IRFPA series. (a) Scanning electron microscope (SEM) image with the grazing angle of 23.5 μm pixel structure, (b) VGA type IRFPA (HX3100), (c) QVGA type IRFPA (HX0830) for the high performance use, and (d) QVGA type IRFPA (HX0840) for the low power operation use.

OE_52_12_123105_f001.png

Fig. 2

A 23.5 μm pixel pitch application for THz imaging. (a) Detector with 23.5 μm pixel pitch, THz lens, and assembled THz imaging camera. (b) A sample THz image taken by the camera.

OE_52_12_123105_f002.png

Fig. 3

One of the applications for the uncooled IRFPA with 23.5 μm pitch. Series of AEROEYE for EVS.

OE_52_12_123105_f003.png

Since the technology trend of IRFPA toward smaller pixel pitch has steadily progressed, uncooled IRFPAs with 17 μm pixels have been developed and are now available.313 It is expected that the pixel pitch will be further reduced to 12 μm to further enhance the resolution, and reduce the size and costs for uncooled IR camera products.6,9,14 These factors were the source of motivation for the authors to study and develop smaller pixel pitch structures for uncooled IR detectors.

This paper proposes a new pixel structure in which the design parameters of a diaphragm and beams can be individually optimized by improving the fabrication process. The experimental evaluation results of the test devices with smaller pixel pitch fabricated in the existing 23.5 μm pitch ROIC (Ref. 15) are discussed. Then, the result of the new pixel structure applied to QVGA (HX0830) with 23.5 μm pitch is mentioned. Finally, the advanced pixel structure is demonstrated to be realizable.

2.

Issues in Reduction of Pixel Pitch

In this section, issues in reduction of pixel pitch for the conventional technology are discussed.

The schematic plan views of the previous pixel structure for the 640×480 bolometer-type uncooled IRFPA are shown in Fig. 4, where (a) is a pixel without an eaves structure, and (b) is a pixel with an eaves structure. Figure 5 shows the schematic cross-sectional view of that pixel structure along the bias current path. The pixel consists of a diaphragm, two beams, and an eaves structure. A bolometer thin film (vanadium oxide), separated into three rectangular elements, is formed in the diaphragm. The three rectangular elements are electrically connected in a series by electrodes. Electrodes at both ends of the bolometer are connected to electrical contacts on an Si ROIC through the beams. The diaphragm is suspended by the two beams and thermally isolated from the Si ROIC heat sink. Each beam is located along the two contiguous sides of the diaphragm. The beams and connection parts between different levels in the pixel, including the electrical contacts, decrease the fill factor of pixels. Therefore, the eaves structure is adopted to increase it. The eaves structure made of silicon nitride (SiN) film, which acts as an absorber of IR radiation, extends from the periphery of the diaphragm over the beams and the connection parts. Since the loss in the area for the eaves structure is only the gap between adjacent pixels, the eaves structure can easily provide a fill factor of >90%.

Fig. 4

Schematic plan views of the previous pixel structure. (a) Pixel without eaves structure, and (b) pixel with eaves structure.

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Fig. 5

Schematic cross-sectional view of the previous pixel structure along the bias current path.

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Since reduction in pixel pitch reduces the amount of receiving IR radiation, the ratio of signal to noise is required to be improved. Voltage responsivity (RV) and 1/f noise (Vf), which is a major element of bolometer noise for bolometer-type uncooled IR detectors are expressed as follows:

Eq. (1)

RV=αηVBGth11+(2πfτth)2[V/W],

Eq. (2)

Vf=VBKln(12τrof1)[V],

Eq. (3)

K=βN(μμlatt)2.

Here, α is the temperature coefficient of bolometer resistance, η is the IR absorbance, VB is the bias voltage for the bolometer, Gth is the thermal conductance, f is the chopping frequency, τth is the thermal time constant, K is the 1/f noise K value, τro is the pulse width of pulse bias, f1 is the cut-on frequency of amplifier, β is a constant, N is the total number of free carriers in the bolometer thin film, μ is the mobility of free carriers in it, and μlatt is the mobility, dominated by lattice scattering, of free carriers in it, respectively.

RV is directly proportional to α, η, and VB, while it is inversely proportional to Gth. It is not easy to improve α and η because the development of or change in materials is required for the bolometer thin film and the IR absorbing film. An increase in VB is not advantageous because both the Vf [refer to Eq. (2)] and the power consumption are increased. The best approach is to decrease Gth because this can be achieved by modifying the design approach in the pixel structure. Specific design trade-offs include increasing the beam length, narrowing the beam width, and thinning the beam thickness. To improve the 1/f noise term, the relevant parameter is K in Eq. (2). The K term is expressed as Eq. (3), which demonstrates that K is inversely proportional to the total number of free carriers in the bolometer thin film, N. Therefore, to reduce the detector 1/f noise, the volume of the bolometer thin film will be increased.

When the previous pixel structure is considered in light of the above-mentioned matters, there are two issues for the reduction in pixel pitch as follows:

  • 1. There is a trade-off in the relationship between the area of the diaphragm and the beam length. Therefore, when the beam length is extended to improve RV, the area of the diaphragm is reduced, namely, the volume of the bolometer thin film is reduced. Consequently, Vf is increased.

  • 2. If the pixel pitch is reduced while the size of the pixel infrastructure, which provides the connection parts within the pixel structure and is not effective in detecting IR radiation, remains unchanged, the area of the diaphragm and beam length are greatly impacted and results in a reduction in the signal to noise ratio.

3.

Newly Proposed Pixel Structure

To solve the first issue, a new pixel structure consisting of a diaphragm and beams placed in different levels is proposed. The design parameters of the diaphragm and the beams can be individually optimized by such a pixel structure. Figures 6 and 7 show the schematic plan view of the new pixel structure and the schematic cross-sectional view of the new pixel along the bias current path, respectively. The upper level consists of the diaphragm with the bolometer thin film (vanadium oxides) and IR absorber layers (SiN passivation layers), while the lower level consists of the two beams, where one edge connects to the support part of the upper level and the other edge connects to an electrical contact pad on the Si ROIC. The bolometer thin film is separated into three rectangular elements, which are electrically connected in series by electrodes. The electrodes at both ends of the bolometer lead to the support parts and are electrically connected to the electrical contacts on the Si ROIC through electrodes in the beams. The beams of this pixel structure are designed to be placed on adjacent pixels. In Fig. 6, the dashed line on the diaphragm represents the beams of adjacent pixels below the diaphragm.

Fig. 6

Schematic plan view of the newly proposed pixel structure.

OE_52_12_123105_f006.png

Fig. 7

Schematic cross-sectional view of the new pixel structure along the bias current path.

OE_52_12_123105_f007.png

Close-packed arrays of the new pixels are shown in Fig. 8, where (a) is the lower level for the beams, and (b) is the upper level for the diaphragms and the support parts. Although the beams are extended over the adjacent pixels, the pixel pitch can be determined according to the size of the diaphragms and the support parts, independently of the beams.

Fig. 8

Close-packed arrays of new pixels. (a) Lower level for the beams, and (b) upper level for the diaphragms and the support parts.

OE_52_12_123105_f008.png

4.

Reduction in Size of Connection Parts between Different Levels in Pixel

As a means of solving the second issue, the size of connection parts between different levels in pixels can be reduced by improving the fabrication process.

The new pixels, having the diaphragm and the beams in different levels, are basically fabricated with a double-sacrificial layer process. Figure 9 shows the process flow through schematic cross sections of the pixel structure. First, a sacrificial layer (polyimide) is formed on the Si ROIC wafer by coating with photosensitive polyimide, followed by patterning to make a hole in the polyimide layer over the electrical contact pad [Fig. 9(a)]. Next, the backing metal layers, the electrodes, and the SiN passivation layers, which cover the backing metal layers and electrodes from the top and underneath, are formed on the first sacrificial layer [Fig. 9(b)]. Then, the first slit is carved on the passivation layers to delineate the shape of the beam [Fig. 9(c)]. The second sacrificial layer (polyimide) is formed there by coating again with the photosensitive polyimide, followed by patterning to make a hole in the polyimide layer over the connection part of the beam with the support part in upper level [Fig. 9(d)]. The bolometer thin film (vanadium oxide), the electrodes, and the SiN passivation layers (IR absorber film), which cover the bolometer thin film and electrodes from the top and underneath, are formed on the second sacrificial layer [Fig. 9(e)]. The second slit is carved on the passivation layers to delineate the shape of the diaphragm and the support part [Fig. 9(f)]. Finally, the first and second sacrificial layers are removed together through the first and the second slits, using an ashing process utilizing oxygen plasma [Fig. 9(g)].

Fig. 9

Fabrication process for the new pixel with diaphragm and beams in different levels.

OE_52_12_123105_f009.png

Patterning methods of the sacrificial layer before and after reducing the size of connection parts between different levels in pixel are shown in Fig. 10, where (a) is a conventional patterning method, and (b) is a modified patterning method. On the conventional patterning method of the sacrificial layer, the hole, in which the connection part is formed later, is made in the sacrificial layer of photosensitive polyimide using exposure and development processes, followed by curing (heating) the polyimide. The opening size of the hole in the sacrificial layer becomes larger in the development and curing processes. Accordingly, the connection parts occupy a large area in the pixel. On the modified patterning method, the exposure, development, and curing processes are used only for making rough patterns, such as the pattern removing the polyimide outside an imaging area. For making the hole in the sacrificial layer, a dry etching process utilizing a photo-resist mask is used. By such modification, the opening size of the hole can be reduced in diameter by a factor of about 2 to 3. Figure 11 shows scanning electron microscope (SEM) pictures of holes in the sacrificial layer formed by two patterning methods using the same photo-mask, where (a) is by the conventional patterning method, and (b) is by the modified patterning method.

Fig. 10

Patterning methods of sacrificial layer before and after reducing the size of connection parts between different levels in pixel. (a) Conventional patterning method, and (b) modified patterning method.

OE_52_12_123105_f010.png

Fig. 11

SEM pictures of holes in the sacrificial layer formed by two patterning methods using same photo-mask. (a) Conventional patterning method, and (b) modified patterning method.

OE_52_12_123105_f011.png

5.

Test Device Fabrication and Experimental Evaluation Results

The test devices have been fabricated on the Si ROIC for the uncooled IRFPA with 320×240pixels of 23.5 μm pitch (HX0830). The new structure pixels, having small pixel pitches of 12, 15, and 17 μm with the beam width of 0.5 μm and having a small pixel pitch of 17 μm with the beam width of 0.7 μm, are placed in the imaging area of one chip. Because all pixel pitches are not consistent with the pixel pitch of 23.5 μm, all pixels are arrayed by skipping a row. One of the electrodes for the pixels is connected to a readout transistor in ROIC and the other electrode is connected to the reflecting layer, connecting to the vbias line in ROIC. To verify that the close-packed array structure of the new structure pixels can be realized, a test element group (TEG) with such an array structure for all kinds of pixels is laid out outside the imaging area.

SEM pictures of the new structure pixels in the fabricated test devices are shown in Fig. 12, where (a) is the pixel pitch of 12 μm and the beam width of 0.5 μm, (b) is the pixel pitch of 15 μm and the beam width of 0.5 μm, (c) is the pixel pitch of 17 μm and the beam width of 0.5 μm, and (d) is the pixel pitch of 17 μm and the beam width of 0.7 μm. The pictures in the upper and middle positions show the pixels in the imaging area, and in the lower position show the pixels in the TEG with a close-packed array structure. It is found that the new structure pixels with the diaphragm and the beams placed in different levels are successfully formed for all kinds of pixels in the imaging area. In addition, it is also found that the close-packed array structure of the new structure pixels is successfully constructed for all kinds of pixels in the TEG.

Figure 13 shows the thermal images obtained for F/1 optics at 60 Hz frame rate by the test devices. The test devices are mounted in vacuum packages with a germanium window. Photographic objects are a hand and forearm wearing a glove and a dust-free garment, respectively. Since no pixels are arrayed in the imaging area by skipping a row, driving parameters of the test devices are difficult to be optimally tuned. Furthermore, because pixel resistances vary with kinds of pixels, image signals cannot be obtained from all pixels in the imaging area at one time. Figure 13(a) shows the thermal image when the driving parameters are fitted to the pixels with the pixel pitch of 17 μm and the beam width of 0.7 μm. Although some of the image signals can be obtained from the pixels with the pixel pitch of 12 μm and the beam width of 0.5 μm, the image signals cannot be obtained from the pixels with the pixel pitch of 15 μm and the beam width of 0.5 μm, and with the pixel pitch of 17 μm and the beam width of 0.5 μm. On the other hand, Fig. 13(b) shows the thermal image when the driving parameters are largely fitted to the pixels with the pixel pitch of 15 μm and the beam width of 0.5 μm, and with the pixel pitch of 17 μm and the beam width of 0.5 μm. The image signals for these two kinds of pixels can be obtained as shown in Fig. 13(b). As previously discussed, although it is not easy to drive the test devices, the image signals can be successfully obtained from all kinds of pixels.

Fig. 12

SEM pictures of the new structure pixels in fabricated test devices. (a) Pixel pitch of 12 μm and beam width of 0.5 μm, (b) pixel pitch of 15 μm and beam width of 0.5 μm, (c) pixel pitch of 17 μm and beam width of 0.5 μm, and (d) pixel pitch of 17 μm and beam width of 0.7 μm. Pictures in upper and middle positions show pixels in imaging area, and those in lower position show pixels in TEG with close-packed array structure.

OE_52_12_123105_f012.png

Table 1 shows the estimation and the measurement results of thermal conductance (Gth), thermal time constant (τth), and noise equivalent temperature difference (NETD) at F/1 optics. The measured values approximately correspond to the estimated values. The practical performance for the uncooled IRFPAs is not clearly defined, but as a rough guideline, it is considered that the NETD value is required to be smaller than 100 mK and preferably smaller than 50 mK, and the τth value is required to be smaller than about 20 ms. Therefore, for the pixels with the pixel pitch of 12 μm and the beam width of 0.5 μm, the NETD and τth values are acceptable levels, and for the other kinds of pixels, the NETD values are excellent, but the τth values do not meet the practical performance. However, they have only a little deficiency in performance. Accordingly, it is concluded that the performance that is nearly equal to the practical one has been able to be obtained for all kinds of pixels in the fabricated test devices. Furthermore, it is expected that when the fabrication process used to the test devices is optimized, the uncooled IRFPAs with the desired performance can be realized by utilizing such new structure pixels with a small pixel pitch.

Table 1

Estimation and measurement results for the fabricated test devices.

Pixel typeGth(W/K)τth (ms)NETD@F/1 (mK)
EstimationMeasurementEstimationMeasurementEstimationMeasurement
P.P.: 12 μm B.W.: 0.5 μm5.7×1095.3×10913.514.567.363.1
P.P.: 15 μm B.W.: 0.5 μm4.2×1093.8×10929.826.030.649.8
P.P.: 17 μm B.W.: 0.5 μm4.0×1093.7×10940.334.325.339.2
P.P.: 17 μm B.W.: 0.7 μm7.7×1098.7×10921.123.342.939.6

6.

Application of Newly Proposed Pixel Structure into QVGA Type IRFPA

To improve the responsivity, the newly proposed pixel structure has also been applied to the existing QVGA type IRFPA (HX0830) with a 23.5 μm pitch.

SEM pictures of the new structure pixels with the pixel pitch of 23.5 μm in HX0830 are shown in Fig. 14, where (a) is the pixels with the close-packed array structure in the imaging area, and (b) and (c) are the unit pixel with the adjacent pixels removed. It is found that the close-packed array of the new structure is successfully realized in the imaging area.

Fig. 13

Thermal images obtained for F/1 optics at 60 Hz frame rate by the test devices. Photographic objects are a hand and forearm wearing a glove and a dust-free garment, respectively. (a) Thermal image when the driving parameters are fitted to pixels with the pixel pitch of 17 μm and beam width of 0.7 μm, and (b) thermal image when the driving parameters are largely fitted to pixels with the pixel pitch of 15 μm and beam width of 0.5 μm, and with the pixel pitch of 17 μm and beam width of 0.5 μm. Abbreviations “P.P.” and “B.W.” indicate pixel pitch and beam width, respectively.

OE_52_12_123105_f013.png

Figure 15 shows a thermal image obtained by QVGA type IRFPA (HX0830) with the new structure pixel of 23.5 μm pitch with F/1 optics at 60 Hz frame rate. It has been verified that the clear images can be obtained for the close-packed array structure with a 23.5 μm pitch.

Fig. 14

SEM pictures of the new structure pixels with the pixel pitch of 23.5 μm in HX0830. (a) Pixels with close-packed array structure in image area, and (b) and (c) unit pixel with the adjacent pixels removed.

OE_52_12_123105_f014.png

As a result, it has been found that the QVGA type IRFPA with the new structure pixel showed higher responsivity by a factor of about 1.7 compared to the conventional one. This new structure pixel will also be able to be applied to other 23.5 μm pitch IRFPA series to improve their responsivity.

7.

Advanced Pixel Structure with Beams Composed of Two Levels

To further improve the detector performance, the advanced pixel structure with two-level beams of Fig. 16 has been examined. The test devices with the advanced pixel structure have also been fabricated on the Si ROIC for the uncooled IRFPA HX0830. Four advanced pixels of 11.75 μm pitch are formed into each ROIC pixel of 23.5 μm pitch.

Fig. 15

Thermal image obtained by QVGA type IRFPA (HX0830) with the new structure pixel of 23.5 μm pitch (with F/1 at 60 Hz).

OE_52_12_123105_f015.png

Figure 17 shows the two patterns of beams placed in the imaging area of one test device. It shows that there are the beams corresponding to four pixels upon one ROIC pixel. The overall length of one beam with 0.5 μm in width is 92 μm, three times longer than the beam length for HX0830. The electrode in the beam consists of pure titanium, not the titanium alloy containing aluminum and vanadium usually employed, to prevent the electrode resistance from increasing too much. Since one pixel at the upper left of four pixels upon one ROIC pixel is electronically connected to the readout transistor, it can be electronically evaluated.

Fig. 16

Advanced pixel structure with beams composed of two levels.

OE_52_12_123105_f016.png

SEM pictures of advanced structure pixels with the pixel pitch of 11.75 μm are shown in Fig. 18, where Fig. 18(b) corresponds to the pattern of beams in Fig. 17(a), and 18(c) corresponds to it in Fig. 17(b). In Figs. 18(b) and 18(c), the diaphragms and the beams are removed from some pixels to reveal the pixel structure under the diaphragm. It shows that the beams composed of two levels can successfully maintain a microbridge structure. Between the two patterns of beams, there is no great distinction in shape.

Fig. 17

Two patterns of beams placed in the imaging area of one test device. (a) Vertical pattern for beam, and (b) horizontal pattern for beam.

OE_52_12_123105_f017.png

Figure 19 shows the histogram of pixel resistance for the pixels electronically connected to the readout transistor in the ROIC. The nonuniformity of pixel resistance is <1.7%. Since the electrical contacts are successfully formed, they have no negative effect on the detector 1/f noise.

Fig. 18

SEM pictures of advanced structure pixels with the pixel pitch of 11.75 μm. (a) Pixels with close-packed array structure in image area, (b) pixels in region corresponding to it for Fig. 17(a), and (c) pixels in region corresponding to it for Fig. 17(b). In (b) and (c), the diaphragms and the beams are removed from some pixels to reveal the pixel structure under the diaphragm.

OE_52_12_123105_f018.png

Fig. 19

Histogram of pixel resistance for the advanced structure pixels electronically connected to readout transistor in ROIC.

OE_52_12_123105_f019.png

The characteristics for the advanced pixels with a 12 μm pitch are estimated. The overall length of one beam is 109 μm. The K value for the detector 1/f noise is estimated to be 2.9×1012. The Gth value is estimated to be 3.5×109W/K. Since the advanced pixels have no IR absorbing film with the interference effect of light as with the above-mentioned pixels, the IR absorbance for the advanced pixels is almost determined by that for the SiN passivation layers. The NETD for the advanced pixels is estimated to be 46.5 mK for F/1 optics.

8.

Conclusion

The uncooled IR detectors with small pixel pitches of 12, 15, and 17 μm have been successfully developed by adopting a newly proposed pixel structure consisting of the diaphragm and beams placed in different levels and by reducing the size of connection parts between different levels in the pixel. The test devices have shown that their performances are nearly equal to the practical one for all kinds of small pitch pixels. Then, the responsivity of QVGA type IRFPA (HX0830) has been improved by a factor of about 1.7, with the new structure pixel of 23.5 μm pitch. Furthermore, the advanced pixel structure with the beams composed of two levels has been demonstrated to be realizable. It is expected that the uncooled IRFPAs with the desired performance can be realized by utilizing the new structure pixel with a small pixel pitch (17μm) when the fabrication process is optimized.

Acknowledgments

The work for test devices of new pixel design with 12, 15, and 17 μm pitch was supported by the project of Japan Aerospace eXploration Agency (JAXA). Then, the work for advanced pixel structure was supported by the project of New Energy and Industrial Technology Development Organization (NEDO). The authors are very grateful to Messrs. S. Yamagata, M. Hijikawa, K. Iida, A. Ajisawa, and Dr. N. Oda for their encouragement during this work.

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Biography

OE_52_12_123105_d001.png

Shigeru Tohyama received the BE and ME degrees in electronics engineering from Hosei University, Tokyo, Japan, in 1982 and 1984, respectively. He joined NEC Corporation in 1984, and now he is a senior expert in the Guidance and Electro-Optics Division. He has been engaged in the development of infrared image sensors using semiconductors and bolometers. He is a member of Japan Society of Applied Physics.

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Tokuhito Sasaki received the BE and ME degrees in electrical engineering from Osaka University in 1986 and 1988, respectively. He joined NEC Corporation in 1988, and now he is a senior manager in the Guidance and Electro-Optics Division. He has been engaged in the development of infrared sensors using semiconductors and bolometers. He is a member of the Japan Society of Applied Physics.

OE_52_12_123105_d003.png

Tsutomu Endoh graduated from Asahi High School in 1989. He joined NEC Corporation in 1989, and now he is a manager in the Guidance and Electro-Optics Division. He has been engaged in the development of on-chip readout integrated circuits.

OE_52_12_123105_d004.png

Masahiko Sano received the BE and ME degrees in material engineering from Waseda University, Tokyo, Japan in 1988 and 1990, respectively. He joined NEC Corporation in 1990, and now he is a manager in Guidance and Electro-Optics Division. He has been engaged in the development of infrared image sensors and optical materials.

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Koji Kato graduated from the University of Electro-Communications, Department of Machine control Engineering, Tokyo, Japan, in 1999. He joined NEC Corporation in 1989, and now he is a manager in the Guidance and Electro-Optics Division. He has been engaged in the development of infrared sensors using semiconductors and bolometers.

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Seiji Kurashina graduated from Nihon University, Department of Electronics Engineering (ME), Tokyo, Japan, in 1994. He joined NEC Corporation in 1994, and now he is a manager in the Guidance and Electro-Optics Division. He has been engaged in the development of infrared sensors using semiconductors and bolometers. He is a member of the Magnetics Society of Japan.

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Masaru Miyoshi graduated from the electrical course of Yawatahama Technical High School in 1992. He joined NEC Corporation in 1992, and now he is a member of the Guidance and Electro-Optics Division. He has been engaged in the development of infrared sensors using semiconductors and bolometers.

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Takao Yamazaki received the BE and ME degrees in electronic engineering from Nihon University, Tokyo, Japan, in 1989 and 1991, respectively. He joined the NEC Corporation, Tokyo, Japan, in 1991, and now he is a manager in the Guidance and Electro-Optics Division. He had engaged in development of magnetro-optical disk, magnetro-resistance head, and three-dimensional stacked packaging technologies from 1991 to 2009. Since then, he has been engaged in the development of packaging technologies for infrared image sensors.

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Munetaka Ueno received the PhD degree in physics from Kyoto University, in 1995. He joined Department of Earth Science and Astronomy, University of Tokyo, as an assistant professor in 1995. He has been working on developing space missions in Institute of Space and Astronautical Science (ISAS), Japan Aerospace Exploration Agency (JAXA), since 2009. He is currently a director of ISAS program office.

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Haruyoshi Katayama obtained PhD in 2003 at Osaka University, Department of Earth and Space Science. From 2003, he works at JAXA as an engineer. From 2006, he is involved in the research and development of earth observation sensors.

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Tadashi Imai received the MS degree in geophysics from Tohoku University, Sendai, Japan in 1996. He has been with the JAXA since 1996.

CC BY: © The Authors. Published by SPIE under a Creative Commons Attribution 4.0 Unported License. Distribution or reproduction of this work in whole or in part requires full attribution of the original publication, including its DOI.
Shigeru Tohyama, Tokuhito Sasaki, Tsutomu Endoh, Masahiko Sano, Koji Kato, Seiji Kurashina, Masaru Miyoshi, Takao Yamazaki, Munetaka Ueno, Haruyoshi Katayama, and Tadashi Imai "Uncooled infrared detectors toward smaller pixel pitch with newly proposed pixel structure," Optical Engineering 52(12), 123105 (18 December 2013). https://doi.org/10.1117/1.OE.52.12.123105
Published: 18 December 2013
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CITATIONS
Cited by 8 scholarly publications and 1 patent.
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KEYWORDS
Bolometers

Readout integrated circuits

Infrared detectors

Electrodes

Thermography

Optical lithography

Thin films

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