This paper presents a novel technique for the integration of Complementary Metal-Oxide Semiconductor (CMOS) chip with a Photonic Integrated Circuit (PIC). This proposed technique is demonstrated by integrating a PIC comprising of 2X2 optical switches and a CMOS header processor, implemented in the IBM 130nm CMOS technology. The processor configures the switch fabric on the PIC allowing for the design of ultra-fast low-power optical packet switching. An innovative CMOS chip based imprinted hard mask technique, utilizing a heat curable Polydimethylsiloxane (PDMS), allows for accurate microfabrication of wafer-scale sockets. The fabricated sockets in the PIC are at-most 9 μm larger than the chip on all sides. Accurate alignment between chips is achieved by using bottom side contact lithography printer to pattern alignment marks on the backside of the chip, making the process insensitive to chip size variations. Independent temperature control of the arm and the stage in the flip-chip bonder enables localized polymerization of PDMS to form imprinted hard mask for integration of PIC with more than one CMOS chip, enabling seamless multichip integration. The horizontal gap and the vertical displacement between the chip and the PIC were 7 and 0.5 um respectively. Electrical connections between the CMOS chip and the PIC were patterned and tested both electrically and optically. These measurements show that the functionality of the PIC and the CMOS chip were not affected by the integration process.