The Common Readout Interface (CRI) is an important component of the new architecture of readout and DAQ chain for CBM. The paper presents the results of preliminary analysis and experiments performed to assess the possibility to implement the CRI firmware in the selected prototyping hardware platform. It also reviews functionalities provided by the Zynq UltraScale+ platform regarding their usability for the creation of the PCIe-based data concentration system.
One of the most important tasks handled by electronic systems in High Energy Physics (HEP) experiments is data acquisition (DAQ). Architecture and requirements of DAQ systems are tightly coupled. DAQ requirements strongly influence system architecture and, at the same time, inherent constraints of chosen architecture (and hardware) may necessitate update of DAQ system requirements. One of the most important characteristics of a given DAQ system is it’s data synchronisation capability, which is constrained by performance of experiment’s timing system. This paper presents an overview of most popular timing system architectures and describes how this choice influences data synchronisation capabilities.
The implementation of the CBM readout and DAQ chain is currently reconsidered. The proposed changes include replacement of two sets of FPGA-based boards with a single one: Common Readout Interface (CRI) board. The paper presents the analysis performed to select the optimal hardware platform for the CBM CRI, considering the cost and the number of input links serviced by a single board.
This article presents method of modeling in Matlab hardware architecture dedicated for FPGA created by languages like VHDL or Verilog. Purposes of creating such type of model with its advantages and disadvantages are described. Rules presented in this article were exploited to create model of Serial Data Acquisition algorithm used in X-ray GEM detector system. Result were compared to real working model implemented in VHDL. After testing of basic structure, other two structures were modeled to see influence parameters of the structure on its behavior.
Soft X-ray (SXR) measurement systems working in tokamaks or with laser generated plasma can expect high photon fluxes. Therefore it is necessary to focus on data processing algorithms to have the best possible efficiency in term of processed photon events per second. This paper refers to recently designed algorithm and data-flow for implementation of charge data acquisition in FPGA. The algorithms are currently on implementation stage for the soft X-ray diagnostics system. In this paper despite of the charge processing algorithm is also described general firmware overview, data storage methods and other key components of the measurement system. The simulation section presents algorithm performance and expected maximum photon rate.
This paper describes firmware architecture of a new part of muon trigger system of the CMS detector – one of four detectors installed along LHC accelerator in CERN. Overlap Muon Track Finder (OMTF) is a new trigger subsystem designed to work in difficult barrel-endcap region of CMS detector. OMTF is designed to receive data from different detector types and process it to select 3 best muon candidates. These muon candidates are then forwarded to Global Muon Trigger (GMT). Performance requirements demanded usage of custom designed hardware. All the data reception and processing takes part in modern, large FPGA device. The IPBus module allows easy firmware control and diagnostics via Ethernet connection.
In this paper the object oriented hardware-software model and its sample implementation of diagnostics for the Overlap Muon Track Finder trigger for the CMS experiment in CERN is described. It presents realization of test-bench for control and diagnosis class of multichannel, distributed measurement systems based on FPGA chips. The test-bench fulfills requirements for system’s rapid changes, configurability and efficiency. This ability is very significant and desirable by expanded electronic systems. The solution described is a software model based on a method of address space management called the Component Internal Interface (CII). Establishment of stable link between hardware and software, as a purpose of designed and realized programming environment, is presented. The test-bench implementation and example of OMTF algorithm test is presented.
Proc. SPIE. 9662, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2015
KEYWORDS: MATLAB, Detection and tracking algorithms, Sensors, Data storage, Field programmable gate arrays, Data transmission, Data acquisition, Data processing, Telecommunications, Data communications
This article proposes new method of storing data and transferring it to PC in the X-ray GEM detector system. The whole process is performed by FPGA chips (Spartan-6 series from Xilinx). Comparing to previous methods, new approach allows to store much more data in the system. New, improved implementation of the communication algorithm significantly increases transfer rate between system and PC. In PC data is merged and processed by MATLAB. The structure of firmware implemented in the FPGAs is described.
This article concerns optimization methods for data analysis for the X-ray GEM detector system. The offline analysis of collected samples was optimized for MATLAB computations. Compiled functions in C language were used with MEX library. Significant speedup was received for both ordering-preprocessing and for histogramming of samples. Utilized techniques with obtained results are presented.
Proc. SPIE. 9662, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2015
KEYWORDS: Digital signal processing, Detection and tracking algorithms, Data modeling, Sensors, Field programmable gate arrays, Data processing, Signal processing, Operating systems, Data communications, Parallel computing
This article is an assessment of potential parallelization of histogramming algorithms in GEM detector system. Histogramming and preprocessing algorithms in MATLAB were analyzed with regard to adding parallelism. Preliminary implementation of parallel strip histogramming resulted in speedup. Analysis of algorithms parallelizability is presented. Overview of potential hardware and software support to implement parallel algorithm is discussed.
This article debates about data fast acquisition and histogramming method for the X-ray GEM detector. The whole
process of histogramming is performed by FPGA chips (Spartan-6 series from Xilinx). The results of the histogramming
process are stored in an internal FPGA memory and then sent to PC. In PC data is merged and processed by MATLAB.
The structure of firmware functionality implemented in the FPGAs is described. Examples of test measurements and
results are presented.
Presented 2D gaseous detector system has been developed and designed to provide energy resolved fast dynamic plasma radiation imaging in the soft X-Ray region with 0.1 kHz exposure frequency for online, made in real time, data acquisition (DAQ) mode. The detection structure is based on triple Gas Electron Multiplier (GEM) amplification structure followed by the pixel readout electrode. The efficiency of detecting unit was adjusted for the radiation energy region of tungsten in high-temperature plasma, the main candidate for the plasma facing material for future thermonuclear reactors. Here we present preliminary laboratory results and detector parameters obtained for the developed system. The operational characteristics and conditions of the detector were designed to work in the X-Ray range of 2-17 keV. The detector linearity was checked using the fluorescence lines of different elements and was found to be sufficient for good photon energy reconstruction. Images of two sources through various screens were performed with an X-Ray laboratory source and 55Fe source showing a good imaging capability. Finally offline stream-handling data acquisition mode has been developed for the detecting system with timing down to the ADC sampling frequency rate (~13 ns), up to 2.5 MHz of exposure frequency, which could pave the way to invaluable physics information about plasma dynamics due to very good time resolving ability. Here we present results of studied spatial resolution and imaging properties of the detector for conditions of laboratory moderate counting rates and high gain.
The Triple Gas Electron Multiplier (T-GEM) is presented as soft X-ray (SXR) energy and position sensitive detector for high-resolution X-ray diagnostics of magnetic confinement fusion plasmas . Multi-channel measurement system and essential data processing for X-ray energy and position recognition is consider. Several modes of data acquisition are introduced depending on processing division for hardware and software components. Typical measuring issues aredeliberated for enhancement of data quality. Fundamental output characteristics are presented for one and two dimensional detector structure. Representative results for reference X-ray source and tokamak plasma are demonstrated.
This paper describes the concept of data management software for the multichannel readout system for the GEM
detector used in WEST Plasma experiment. The proposed system consists of three separate communication
channels: fast data channel, diagnostics channel, slow data channel. Fast data channel is provided by the FPGA
with integrated ARM cores providing direct readout data from Analog Front Ends through 10GbE with short,
guaranteed intervals. Slow data channel is provided by multiple, fast CPUs after data processing with detailed
readout data with use of GNU/Linux OS and appropriate software. Diagnostic channel provides detailed feedback
for control purposes.
The paper presents the concept of the Overlap Muon Track Finder (OTF) trigger for the CMS experiment in CERN as a
system implemented in the modern FPGA device. The parametrized description of the complex data processing system,
allowing further optimization by iterative simulations and recompilations, is presented. Problems associated with synthesis
of such complex systems with currently available synthesis tools, and their workarounds are described.
This paper describes current status of electronics, firmware and software development for new plasma measurement
system for use in WEST facility. The system allows to perform two dimensional plasma visualization (in time) with
spectrum measurement. The analog front-end is connected to Gas Electron Multiplier detector (GEM detector).
The system architecture have high data throughput due to use of PCI-Express interface, Gigabit Transceivers and
sampling frequency of ADC integrated circuits. The hardware is based on several years of experience in building X-ray
spectrometer system for Joint European Torus (JET) facility. Data streaming is done using Artix7 FPGA devices.
The system in basic configuration can work with up to 256 channels, while the maximum number of measurement
channels is 2048. Advanced firmware for the FPGA is required in order to perform high speed data streaming and analog
signal sampling. Diagnostic system management has been developed in order to configure measurement system, perform
necessary calibration and prepare hardware for data acquisition.
A novel approach to two dimensional Gas Electron Multiplier (GEM) detector readout is presented. Unlike
commonly used methods, based on discriminators and analogue FIFOs, the method developed uses simulta-
neously sampling high speed ADCs with fast hybrid integrator and advanced FPGA-based processing logic to
estimate the energy of every single photon. Such a method is applied to every GEM strip / pixel signal. It is
especially useful in case of crystal-based spectrometers for soft X-rays, 2D imaging for plasma tomography and
all these applications where energy resolution of every single photon is required. For the purpose of the detector
readout, a novel, highly modular and extendable conception of the measurement platform was developed. It is
evolution of already deployed measurement system for JET Spectrometer.
This paper presents the system integrating the dedicated measurement and control electronic systems for Gas Electron Multiplier (GEM) detectors with the Control and Data Acquisition system (CODAS) in the JET facility in Culham, England. The presented system performs the high level procedures necessary to calibrate the GEM detector and to protect it against possible malfunctions or dangerous changes in operating conditions. The system also allows control of the GEM detectors from CODAS, setting of their parameters, checking their state, starting the plasma measurement and to reading the results. The system has been implemented using the Python language, using the advanced libraries for implementation of network communication protocols, for object based hardware management and for data processing.
This paper describes architecture of a new data acquisition system (DAQ) targeted mainly at plasma diagnostic experiments. Modular architecture, in combination with selected hardware components, allows for straightforward reconfiguration of the whole system, both offline and online. Main emphasis will be put into the implementation of data transmission subsystem in said system. One of the biggest advantages of described system is modular architecture with well defined boundaries between main components: analog frontend (AFE), digital backplane and acquisition/control software. Usage of a FPGA chips allows for a high flexibility in design of analog frontends, including ADC ↔ FPGA interface. Data transmission between backplane boards and user software was accomplished with the use of industry-standard PCI Express (PCIe) technology. PCIe implementation includes both FPGA firmware and Linux device driver. High flexibility of PCIe connections was accomplished due to use of configurable PCIe switch. Whenever it's possible, described DAQ system tries to make use of standard off-the-shelf (OTF) components, including typical x86 CPU & motherboard (acting as PCIe controller) and cabling.
This article presents a fast charge histogramming method for the position sensitive X-ray GEM detector. The energy
resolved measurements are carried out simultaneously for 256 channels of the GEM detector. The whole process of
histogramming is performed in 21 FPGA chips (Spartan-6 series from Xilinx) . The results of the histogramming process
are stored in an external DDR3 memory. The structure of an electronic measuring equipment and a firmware
functionality implemented in the FPGAs is described. Examples of test measurements are presented.
This paper describes the embedded system used to store and transfer large amounts of data in a multichannel data acquisition system for the GEM detector. The stored data is used for diagnostics purposes.
System consists of an embedded mini ITX motherboard connected through the PCI Express (PCIe) link to a backplane FPGA. The backplane FPGA is connected through the SerDes/GTP links to (up to) 4 carrier boards. Each carrier board is connected to (up to) 4 FMC modules. System allows for a high speed data transfers between the ITX motherboard and the backplane or carrier modules. Due to high performance/reliability requirements, special care is taken for a proper data error correction/packet retransmission scenarios. There is also need for a proper communications diagnostics and a system addressing abstraction.
Due to a distributed nature of described data acquisition system, data stored in DDR memory has to have a specific structure. This structure allows for a proper synchronisation of data between all the carrier boards.
This paper describes the embedded controller used for the multichannel readout system for the GEM detector. The controller is based on the embedded Mini ITX mainboard, running the GNU/Linux operating system. The controller offers two interfaces to communicate with the FPGA based readout system. FPGA configuration and diagnostics is controlled via low speed USB based interface, while high-speed setup of the readout parameters and reception of the measured data is handled by the PCI Express (PCIe) interface. Hardware access is synchronized by the dedicated server written in C. Multiple clients may connect to this server via TCP/IP network, and different priority is assigned to individual clients. Specialized protocols have been implemented both for low level access on register level and for high level access with transfer of structured data with "msgpack" protocol. High level functionalities have been split between multiple TCP/IP servers for parallel operation. Status of the system may be checked, and basic maintenance may be performed via web interface, while the expert access is possible via SSH server. System was designed with reliability and flexibility in mind.
Proc. SPIE. 8454, Photonics Applications in Astronomy, Communications, Industry, and High-Energy Physics Experiments 2012
KEYWORDS: Electronics, Field programmable gate arrays, Control systems, Data transmission, Data acquisition, Telecommunications, Information technology, Operating systems, Data communications, Information operations
This paper presents a PCI Express based system dedicated for communication with FPGA in data acquisition systems.
The system consisted of FPGA IP core containing PCIE endpoint tightly coupled with with the user core (further
denoted as “USR core”) and the DDR3 memory controller, together with Linux device driver. The Linux OS was
running on top of typical x86-64 system.