In the semiconductor manufacturing, the control of Chemical-Mechanical Planarization (CMP) process time for Shallow Trench Isolation (STI) is important. A wafer under- or over-polishing causes leakage and short-circuits making the chips defective. The CMP process control by interferometry is one of the most used systems to monitor the polishing time. In some cases, the interferometry process control is not possible because the wafer patterns cause some unwanted effects such as scattering, diffraction, and absorption. Consequently the signal is affected. In this paper, we apply a theoretical and experimental approach on the light reflected from different STI stacks in order to interpret the observed optical phenomenon. The experimental study is done to get close to the light measurement conditions within the manufacturing environment. With this experiment, we evidence that the trench pattern inside memory zones is responsible for the diffraction effect on the signal. In a production environment, this pattern results in a lower measured intensity when the size of memory area increases. Besides, numerical calculations are performed based on differential method in order to predict the diffracted intensity, which depends on the chip design parameters and the incident wavelengths tuning. By using STI models, this method helps to determine the wavelengths with the highest reflected intensity.