Conventional doping of crystalline Si via ion implantation results in a stochastic distribution of doped regions in the x-y plane along with relatively poor control over penetration depth of dopant atoms. As the gate dimensions get to 10 nm, the related device parameters also need to be scaled down to maintain electrical activity. Thus highly doped abrupt, ultra-shallow junctions are imperative for source-drain contacts to realize sub-10 nm transistors. Uniform ultra-shallow junctions can be achieved via monolayer doping, wherein thermal diffusion of a self-limiting monolayer of dopant atomcontaining organic on Si surface yields sub-5 nm junctions. We have extended the use of organic dopant molecules in the monolayer doping technique to introduce a new class of spin-on polymer dopants. In effect, these new spin-on dopants offer a hybrid between the monolayer doping technique and traditional inorganic spin-on dopants. We have been able to uniformly introduce p- and n-type dopants with doping efficiencies comparable to the monolayer doping technique. Control over junction depth can be easily achieved via optimizing annealing temperature and time. Concurrently, sequestering the dopant precursors within the cores of block copolymer micelles allows us to achieve precise control over the spatial positions of dopant atoms in all three dimensions owing to the high periodicity of block copolymer domains on the 10-100 nm length scale.
We report solution-based processing of high-purity semiconducting carbon nanotube networks that has led to low-cost fabrication of large quantity of thin-film transistors (TFTs) with excellent yield and highly uniform, respectable performance on mechanically flexible substrates. Based on the semiconducting carbon nanotube TFTs, a wide range of macro-scale system-level electronics have been demonstrated including flexible integrated circuits, flexible full-color active-matrix organic light-emitting diode display, and smart interactive skin sensor that can simultaneously map and respond to the outside stimulus. Our work shows carbon nanotubes’ immense promise as a low-cost and scalable TFT technology for nonconventional electronic systems with excellent performances.
Much progress has been made in recent years in the fabrication and understanding of the operations of Single-walled carbon nanotube (SWNT) field effect transistors (FETs). Nevertheless, it remains a challenge to develop highly scaled device structures for nanotube transistors and push to the performance limit of these molecular materials. The purpose of this work is to fabricate highly scaled SWNT field effect transistors (FETs) and approach the performance limit of carbon nanotube FETs.
Conference Committee Involvement (4)
Carbon Nanotubes, Graphene, and Associated Devices III
1 August 2010 | San Diego, California, United States
Carbon Nanotubes, Graphene, and Associated Devices II
5 August 2009 | San Diego, California, United States
Carbon Nanotubes and Associated Devices
10 August 2008 | San Diego, California, United States
Nanomaterials Synthesis, Interfacing, and Integrating in Devices, Circuits, and Systems II