Dr. Arindam Mallik
Specialist Researcher at IMEC
SPIE Involvement:
Author | Instructor
Publications (9)

PROCEEDINGS ARTICLE | April 23, 2018
Proc. SPIE. 10583, Extreme Ultraviolet (EUV) Lithography IX
KEYWORDS: Semiconductors, Lithography, Optical lithography, Metals, Manufacturing, Photomasks, Extreme ultraviolet, Extreme ultraviolet lithography, Double patterning technology, Semiconducting wafers

PROCEEDINGS ARTICLE | March 23, 2018
Proc. SPIE. 10583, Extreme Ultraviolet (EUV) Lithography IX
KEYWORDS: Optical lithography, Etching, Metals, Copper, Resistance, Photomasks, Extreme ultraviolet, Critical dimension metrology, Semiconducting wafers, Tin

PROCEEDINGS ARTICLE | March 20, 2018
Proc. SPIE. 10589, Advanced Etch Technology for Nanopatterning VII
KEYWORDS: Oxides, Etching, Metals, Dielectrics, Scanning electron microscopy, Photoresist materials, Line edge roughness

PROCEEDINGS ARTICLE | April 7, 2017
Proc. SPIE. 10149, Advanced Etch Technology for Nanopatterning VI
KEYWORDS: Amorphous silicon, Semiconductors, Lithography, Optical lithography, Silica, Etching, Metals, Coating, Materials processing, Photomasks, Extreme ultraviolet, Double patterning technology, High volume manufacturing, System on a chip, Standards development, Tin

PROCEEDINGS ARTICLE | March 24, 2017
Proc. SPIE. 10143, Extreme Ultraviolet (EUV) Lithography VIII
KEYWORDS: Logic, Optical lithography, Etching, Metals, Extreme ultraviolet, Extreme ultraviolet lithography, Critical dimension metrology, Semiconducting wafers, Tin, Back end of line

PROCEEDINGS ARTICLE | April 16, 2015
Proc. SPIE. 9422, Extreme Ultraviolet (EUV) Lithography VI
KEYWORDS: Semiconductors, Lithography, Surface plasmons, Optical lithography, Metals, Photomasks, Extreme ultraviolet, Extreme ultraviolet lithography, Semiconducting wafers, Back end of line

Showing 5 of 9 publications
Course Instructor
SC1101: Understanding Design-Patterning Interactions
This course explains how layout and circuit design interact with lithography choices. We especially focus on multi-patterning technologies such as LELE double patterning and SADP. We will explore role of design in lithography technology development as well as in lithographic process control. We will further discuss design enablement of multi-patterning technologies, especially in context of cell-based digital designs.
SC1187: Understanding Design-Patterning Interactions for EUV and DSA
EUV lithography and DSA haven been accepted by the industry as most promising candidates for dimensional scaling enablement at N7 technology node and beyond. This tutorial explains how introduction of such lithography technologies going to impact layout and circuit design. Choices of lithography would impact physical design and have a significant impact at system level. This tutorial will focus on transition from 193i multi-patterning technologies to EUV lithography and DSA. Factors that would determine on the enablement of these technologies would be highlighted and possible solutions would be shared.
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