Simulation studies along with the necessary experimental verification of the performance of a new combination bake-chill station designed by FSI International in its POLARIS® thermal road-map project is presented in this paper. Since in this new design the 300-mm wafer is heated to the desired bake temperature and chilled back to room temperature before removed out of the station, a tight temperature control of the wafer throughout the process is achieved. To analyze the thermal performance of the station, an axi-symmetric model and a three-dimensional model geometrically similar to the new station are generated. The commercial CFD software Fluent® is employed to solve the Navier Stokes and energy equations in the computational domain. Experimental data as measured by a 42-point OnWaferTM temperature sensor wafer is used to verify the predictions of the simulated transient temperature behavior from the numerical model on the new station. Further, the simulations and experiments presented here substantiate the thermal agility of the proposed combination bake-chill station design. Higher throughput of the cluster, a major productivity improvement contribution of this new design, is also presented. Influence of the combination bake-chill station mechanical and thermal design losses on the wafer surface temperature uniformity and suggestions for improvements are also discussed.
DUV resists are extremely sensitive to temperature variations on the wafer during bake and chill cycles. In resist-processing tracks today, the wafer is moved by a robot or transfer arm, from the bake to chill plate. During this move, since the resist is still above the activation temperature, the wafer temperature is uncontrolled until it is placed on a chill plate. In the new station design presented here, the wafer is heated to the desired bake temperature and chilled back to room temperature before being moved by the robot, resulting in a tight temperature control of the wafer, throughout the process. Two models, axi-symmetric and three-dimensional (geometrically similar to the new station), are generated for analyzing the thermal performance of the above station. The numerical simulations, solving the momentum and energy equations in the computational domain, are performed using the commercial CFD software Fluent. The simulated temporal evolution of temperature from the beginning to the end of the bake-chill process is verified with the experimental data as measured by a 42-point OnWafer temperature sensor wafer on the new station. Methods to improve wafer surface temperature uniformity, in light of bake-chill-station mechanical and thermal design losses are discussed. Higher throughput of the cluster, a major productivity improvement contribution of this new design, is also highlighted.