Optical interconnect is essential for massive data communication in rapidly developed data center and high-performance computing infrastructures. Large bandwidth, high energy efficiency and low latency are intrinsic advantages in optics. But they are also present R&D challenges under new requirements such as low total solution cost and reliable operation in harsh computing environment. Recently we have developed hybrid microring lasers on silicon to enable high integration density, compact chip size, and potentially volume and cost-effective production in a CMOS foundry. Novel structures such as thermal shunts and hybrid metal-oxide-semiconductor (MOS) capacitors were integrated into the laser cavity to allow over 100 oC cw operation and "zero-power" laser wavelength and power control. Special CMOS driver with equalization functionality for direct microring laser modulation with good signal integrality was also designed and fabricated in a 65 nm foundry process. For the first time, we integrated all these designs and chips together to demonstrate a 5-channel hybrid transmitter with 0.5 nm channel spacing and overall 70 Gb/s direct modulation rate. A novel direct photon lifetime modulation with much larger bandwidth than conventional injection current modulation by modulating bias on the MOS capacitor is demonstrated for the first time as well. Finally we review our on-going progress on migrating the similar design from a standard quantum well laser active region to a superior quantum-dot one for further improved temperature and dynamic performance.
Increased data rates have motivated the investigation of advanced modulation schemes, such as four-level pulseamplitude modulation (PAM4), in optical interconnect systems in order to enable longer transmission distances and operation with reduced circuit bandwidth relative to non-return-to-zero (NRZ) modulation. Employing this modulation scheme in interconnect architectures based on high-Q silicon photonic microring resonator devices, which occupy small area and allow for inherent wavelength-division multiplexing (WDM), offers a promising solution to address the dramatic increase in datacenter and high-performance computing system I/O bandwidth demands. Two ring modulator device structures are proposed for PAM4 modulation, including a single phase shifter segment device driven with a multi-level PAM4 transmitter and a two-segment device driven by two simple NRZ (MSB/LSB) transmitters. Transmitter circuits which utilize segmented pulsed-cascode high swing output stages are presented for both device structures. Output stage segmentation is utilized in the single-segment device design for PAM4 voltage level control, while in the two-segment design it is used for both independent MSB/LSB voltage levels and impedance control for output eye skew compensation. The 65nm CMOS transmitters supply a 4.4V<sub>ppd</sub> output swing for 40Gb/s operation when driving depletion-mode microring modulators implemented in a 130nm SOI process, with the single- and two-segment designs achieving 3.04 and 4.38mW/Gb/s, respectively. A PAM4 optical receiver front-end is also described which employs a large input-stage feedback resistor transimpedance amplifier (TIA) cascaded with an adaptively-tuned continuous-time linear equalizer (CTLE) for improved sensitivity. Receiver linearity, critical in PAM4 systems, is achieved with a peak-detector-based automatic gain control (AGC) loop.