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Ashok Agarwal
at National Institute of Technology Warangal
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Publications (1)
Proceedings Article | 28 January 2013 Paper
FPGA implementation of digital down converter using CORDIC algorithm
Ashok Agarwal, Boppana Lakshmi
Proceedings Volume 8760, 87601K (2013) https://doi.org/10.1117/12.2012307
KEYWORDS: Field programmable gate arrays, Digital signal processing, Digital filtering, Signal processing, Global system for mobile communications, Linear filtering, Data communications, Electronics, Receivers, Phase shifts
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