As technology nodes advance, the need for higher sensitivity optical inspection to identify critical defects has become extremely important for technology development. However, more sensitive optical inspection can induce more nuisance and hence more SEM non-visual (SNV) defects during review sampling. High SNV in the defect Pareto hinders the ability to get a true picture of the actual distribution of defect types on a wafer, and defect-of-interest (DOI) types that are crucial for process diagnostics can be missed. The culprit of this problem is the method of review sampling.
Traditional review sampling consists of two parts: binning and defect selection. Binning is defined as a set of rules and conditions determined by human experience and judgment to categorize different DOI types. Then, defects are selected from each bin and reviewed by SEM. Due to the nature of high SNV from optical inspection, the random selection of defects will end up with high SNV in the defect Pareto. A defect Pareto with high SNV provides little value to yield learning. Because SEM review plus classification is limited by time and economic budget, improving the ability to predict whether a defect is DOI or SNV before SEM review is valuable.
This paper introduces a machine learning based method suitable for high volume manufacturing that can increase the probability of finding DOIs during review sampling by integrating all available data sources, such as historical defect attributes from optical inspection, context information of the inspection recipe, design hotspots and metrology measurements. In addition to review sampling, this paper also illustrates other applications based on machine learning defect prediction, such as virtual process window discovery, and predicted defect types for trend monitoring. A predictive analytics platform was employed to allow defect type prediction based upon multiple inputs.
The key challenge for enablement of a second node of single-expose EUV patterning is understanding and mitigating the patterning-related defects that narrow the process window. Typical in-line inspection techniques, such as broadband plasma and e-beam systems, find it difficult to detect the main yield-detracting defects postdevelop, and thus understanding the effects of process improvement strategies has become more challenging. New techniques and methodologies for detection of EUV lithography defects, along with judicious process partitioning, are required to develop process solutions that improve yield. This paper will first discuss alternative techniques and methodologies for detection of lithography-related defects, such as scumming and microbridging. These strategies will then be used to gain a better understanding of the effects of material property changes, process partitioning, and hardware improvements, ultimately correlating them directly with electrical yield detractors.
The key challenge for enablement of a 2nd node of single-expose EUV patterning is understanding and mitigating the patterning-related defects that narrow the process window. Typical in-line inspection techniques, such as broadband plasma (291x) and e-beam systems, find it difficult to detect the main yield-detracting defects post-develop, and thus understanding the effects of process improvement strategies has become more challenging. New techniques and methodologies for detection of EUV lithography defects, along with judicious process partitioning, are required to develop process solutions that improve yield.
This paper will first discuss alternative techniques and methodologies for detection of lithography-related defects, such as scumming and microbridging. These strategies will then be used to gain a better understanding of the effects of material property changes, process partitioning, and hardware improvements, ultimately correlating them directly with electrical yield detractors .
In advanced IC manufacturing reticle contamination through crystal growth causing printed defects¹ is a major source of yield
loss. This crystal growth requires frequent inspection to ensure reticles are free from such contamination (reticle requalification).
STARlight is the industry accepted method for mask inspection in wafer fabs for reticle re-qualification (requal)
². The principal focus of this paper is a study correlating the detection of contamination (crystal growth) on logic product
masks found with STARlight to defects that can be found on a print-check wafer (a photo-resist test wafer). A critical
component in this study was the translation of reticle coordinates to wafer coordinates and integrating the results between
high-resolution broadband DUV BrightField inspection (BF) and scanning electron microscope (SEM) review. All of the
STARlight defect locations were reviewed using the SEM regardless if the defect was found on opaque or on clear surfaces of
the mask. As such defects being SEM reviewed were classified as either 'printing', 'early-warning' or 'non-printing'. BF defect
inspection results after repeater analysis were compared with STARlight results to determine the correlations. SEM Defect
Review was performed on STARlight inspection results and the resulting classified data was correlated to the BF defect
With the introduction of sub-100nm design rules, and especially 193nm photolithography, the development of new
monitoring strategies is becoming increasingly important and necessary as new materials, new tools and new process
challenges are introduced. Micro after-develop inspection (μADI) is a big step forward for photolithography defect
monitoring as well as for integrated process learning.
Resist quality and handling are essential for the whole process. The new 193nm resists exhibit an inherent defectivity,
which is solely attributable to the quality of the resist. This defectivity comes from very small resist inhomogeneity, and
leads to tiny bridging and stringer defects which can affect yield critically. Additionally, the entire lithography process
(handling and scanning) is more critical, as process windows are decreasing to levels of common positioning accuracy
and layer thicknesses.
On the one hand, increased inspection sensitivity is needed to control the resist quality more tightly. With
straightforward improvements to inspection technology, these sensitivity requirements can be met on test wafers, mainly
because of the wafers' simplified structures and the absence of noise sources. However, on the other hand, there is a
demand for a monitoring strategy which uses product wafers to enable the understanding of the interaction of material,
structure, topography and shrinking process window. Test wafer monitoring is able to provide only an isolated snap shot
of a specific work-step without further interaction. An integrated monitoring strategy of product wafers requires more
advanced and innovative inspection technologies - providing both enhanced sensitivity and superior noise suppression -
as lithography layers can show a lot of non-yield relevant etch mask defects that are very hard to suppress with common
This work introduces a novel after-lithography monitoring strategy based on a darkfield defect inspection technique on
product wafers. Wafers can be scanned after development with superior noise suppression at resolutions approximating
traditional brightfield inspection capabilities enabling lithography defect detection down to single line short levels. Thus,
completely new inspection approaches for tool and line monitoring can be developed, sample plans can be optimized,
and time to results and appropriate corrective actions can be significantly shortened.