Benjamin Duclaux
Senior Engineer at STMicroelectronics (Crolles II) SAS
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Author
Profile Summary

Senior Lithography Research and Development Engineer, working at STMicroelectronics in Crolles (France). Was assignee at Albany (NY) Nanotech center within IBM-GF-Samsung and STMicro alliance. Worked on Lithography process development from 40nm to 7nm logic nodes as well as imaging technology. Now focusing on Overlay and APC for advance fabs.
Publications (3)

Proceedings Article | 20 March 2020 Paper
Proc. SPIE. 11325, Metrology, Inspection, and Process Control for Microlithography XXXIV
KEYWORDS: Lithography, Contamination, Etching, Scanners, Semiconducting wafers, Overlay metrology, Plasma

Proceedings Article | 20 March 2020 Presentation + Paper
Proc. SPIE. 11325, Metrology, Inspection, and Process Control for Microlithography XXXIV
KEYWORDS: Reticles, Metrology, Data modeling, Sensors, Scanners, Semiconducting wafers, Performance modeling, Data corrections, Overlay metrology, Process modeling, Lithographic process control

Proceedings Article | 13 March 2018 Presentation + Paper
Proc. SPIE. 10585, Metrology, Inspection, and Process Control for Microlithography XXXII
KEYWORDS: Reticles, Optical lithography, Data modeling, Scanners, Reliability, Process control, Optical alignment, Overlay metrology

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