Appropriate solutions for post-lithographic defect management and process tool control are fundamental to ensure better chip quality and yield maintenance through the reduction of wafers at risk. The increasing demand in terms of wafer production capacity and sensitivity requirements from the automotive, MEMS and Internet of Things markets is leading advanced legacy semiconductor fabs to challenge their conventional after-develop-inspection (ADI) paradigm. In this work, we present a high throughput photolithography step monitoring scheme, developed by STMicroelectronics and KLA, employing an 8 Series patterned wafer defect inspection system for wafer frontside inspection and review. Namely, we demonstrate the capacity to capture die level defects together with full wafer excursions with a significant level of sensitivity, as well as a beneficial impact on yield improvement and lithography cell control. Moreover, we propose fast and reliable methods for monitoring the pattern shift and mask check, enabling increased wafer sampling and faster rework decisions. Lastly, we show well-engineered on-tool classification solutions at inspection runtime for each defect detected, allowing for improved control with high purity and fully automatic wafer disposition. Besides inline monitoring, we also show the capacity to check process tool performance, to detect lithography excursions faster and more effectively and have a better understanding of defectivity root causes. Moreover, to ensure complete control over the full lithography process, we show after-cleaning-inspection capabilities alongside conventional ADI. In this work, we present the beneficial aspects of the adopted strategy in terms of capacity improvement and critical defect detection in the production line.