We have developed an ultra-high vacuum technique for the fabrication of complex nanosystems incorporating nonlithographic nanoparticles, ohmic contact metals and isolation dielectrics. It is believed that such a multi-component structure is a necessary prerequisite for the realization of practical photonic and electronic devices based on nanoparticles. The technique is compatible with silicon integrated circuit technology, thus making it suitable for volume manufacturing. The technique is also versatile, and allows the deposition of nanoparticles of any metal, semiconductor or insulator with diameters as small as 2 nm with less than 5% size variation. In addition, the technique allows the creation of multi-layered structures of nanoparticles of different dimensions separated by metal or dielectric layers. The technique also has the potential for creating patterned layers of nanopartciles. We have demonstrated the versatility of the equipment by depositing Si-nanoparticles with pre-selected narrow size-distributions as well as multi-layered structures of such nanoparticles.
This paper presents the results of investigations of thin film alumina templates fabricated on silicon and other substrates. Such templates are of significant interest for the low-cost implementation of semiconductor and metal nanostructure arrays. In addition, thin film alumina templates on silicon have the potential for nanostructure integration with silicon electronics. Formation of thin film alumina templates on silicon substrates was investigated under different fabrication conditions, and the dependence of pore morphology and pore formation rate on process parameters was evaluated. In addition, process conditions for improved pore size distribution and periodicity were determined. The template/silicon interface, important for nanostructure integration on silicon, was investigated using different techniques. Thin film alumina templates on non-silicon substrates such as glass, indium-tin-oxide-coated glass and silicon carbide were also investigated.
This paper describes recent efforts at developing a low cost undergraduate laboratory demonstrating current technologies used in integrated optics. The lab was targeted at undergraduate seniors to acquaint them with the role of integrated optics in the communications industry. This project examined two different types of integrated optical devices (1) glass waveguide devices using ion-exchange technique, and (2) polymer devices. Both device types can be implemented using equipment and materials already available in a standard university integrated circuit (IC) fabrication facility. The results of this project identify the polymer fabrication technology as best suited for the average environment found in undergraduate laboratories.
The electroluminescent properties of various porous silicon pn junction devices have been investigated. Devices were fabricated by constant current anodization method as well as a novel method developed for anodizing heavily doped pn junctions. The constant current anodized devices show electroluminescence only under reverse bias condition. The light emission mechanism in these devices is believed to be similar to the hot electron relaxation mechanism observed in a surface-treated crystalline silicon pn junction diode at breakdown. The pn junctions fabricated by the novel anodization technique show electroluminescence under forward bias condition. The light emission mechanism in these devices is believed to be due to electron-hole injection in the silicon quantum wires.