Silicon photonics is poised to revolutionize many application areas, such as telecommunication, date centers, biosensing, high performance computing, etc. A whole silicon photonics process flow based on 200mm CMOS platform and the performance of photonics devices were described in this paper. A series of optimized process, including photolithography, etching, hydrogen annealing, ion implantation, epitaxial growth, etc., are implemented to fabricate low-loss passive devices and high-speed active devices. The propagation loss is sensitive to sidewall roughness originated from the waveguide-patterning process. Hydrogen annealing is an effective method to reduce the propagation loss of waveguides. Every level of implantation in top silicon layer is performed respectively, including the p++, p+, p, n++, n+ and n doping for the modulators, p++, p+, n++ and n+ implants for Ge photodetector. Epitaxial Ge is considered to be an excellent material for photodetectors. High-quality Ge on silicon is grown via selective epitaxy using SiO2 as growth mask, followed by a CMP process to planarize the top of the selectively grown Ge. In our platform, the propagation loss of waveguide is measured to be 2.5dB/cm, the insertion loss of grating coupler at 1550nm is 4.5dB/facet, the crosstalk of cross waveguide is lower than -30dB, the insertion loss of 8 channels 200GHz AWG is approximately 3.3dB, the 3dB bandwidth of MZ modulator achieves higher than 20GHz, and the Ge photodetector operates at high data rate exceeding 40Gbps.
Aiming at vehicle detection on the ground through low resolution SAR images, a method is proposed for determining the region of the vehicles first and then detecting the target in the specific region. The experimental results show that this method not only reduces the target detection area, but also reduces the influence of terrain clutter on the detection, which greatly improves the reliability of the target detection.
In this paper, the process difference between Si photonics and Si CMOS is discussed. Firstly, the substrate of Si photonics and the issues about electronic-photonic integration are commented . Lithography, etching and hydrogen annealing are then discussed in detail. Line edge roughness is thought to be the original source of scattering loss of waveguide. Hydrogen annealing is effective to reduce the sidewall roughness but has the risky of changing the profile of waveguide. Ion implantation and metallization for active photonics components can be easily transferred from the CMOS process recipes. Ge photodetector fabrication is challenging though it shares the same epitaxy equipment with the CMOS platform. Finally, a whole Si photonics process flow including passive and active components based on our 200 mm CMOS platform is presented.