For capacity reasons, it is interesting for us to have the flexibility of switching lithography processes between DUV and I-line steppers. The following discussion concentrates on high energy tilted implants of CMOS technology, critical enough to be worth running on the more expensive DUV equipment. As far as the differences are understood at the level of the printing, as well as the dissimilarities during the following implantation steps, it is possible using the same reticle and with minor target adjustments, to switch between the 2 tools/processes when required. This paper investigates the most important differences between the functionality of a same implant layer making use of the two wavelengths. Taken as high energy implant mask for several successive ion implantations, the resist film considered here is 1.6 pm thick. The taper profiles of I-line and DUV resist are shown after development, and after the successive implantation steps. Both wavelengths provide straight profiles after development, with one main difference: a slight footing for the I-line resist. This can be very well seen on the corresponding top down pictures revealing more tapers for the I-line process than for DUV. The first implantation step following development influences the profiles the most. In fact the profile of the DUV resist changes considerably while the one with I-line resist remains unchanged. That can be explained by the fact that the aliphatic structure of DUV photoresist is less resistant to degradation by ion bombardment as compared to the highly aromatic chemical structure of I-line photoresist. The subsequent implant steps of lower energy do not further influence the tapers, not even in the case of the I-line film. Therefore the biggest shrinkage occurs during the first implantation and all the next ion sequences will see this first deformation without changing it. Finally, simulation show that, an adjustment of the reticle OPC by adding serifs can be beneficial to the I-line layer to diminish corner rounding where the footingkapering can be worse.
As chip dimensions decrease, I-line processes remain of interest for most uncritical layers: they provide the needed
performance at a low cost and high throughput. However the critical dimensions (CD) and overlay requirements for
the newest technologies are much tighter than they used to be, reducing significantly the process windows. Sources
of variations of CD range and CD mean should be well known and the process window set up so as to minimize the
sensitivity to small variations.
For lower resist thickness, although using partially dyed I-line resist, one may have to deal with huge swing effects.
Resist thickness and stack variations are then the main contributors to the high CD distribution This article focuses
on CD instabilities caused by resist thickness fluctuations in the case where a stack layer is subject to variations.
The influence of resist thickness variations is first considered, pointing out the importance of thickness control
methods. The real resist thickness repartition on stacked wafers depends not only on global coating uniformity but
also on local topography. Some examples of resist repartition and its impact on CD-uniformity are provided.
The added contributions of resist and stack to a global swing effect are then discussed on the basis of experimental
data. Significant differences of swing behavior are experimentally observed between critical chip structures and the
usually monitored PCI kerf structure. A simulation illustrates the effect of the local stack thickness and resist
thickness and to better understand those differences, together with cross section thickness measurements.
The choice of an appropriate CD control structure is finally dealt with.
Recently, the design of integrated circuits has become more and more complicated due to higher circuit densities. In particular for logic applications, the design is no longer uniform but combines different kinds of circuits into one mask layout resulting in stringent criteria for both wafer and photomask manufacturing. Photomask CD uniformity control and defectivity are two key criteria in manufacturing today’s high-end reticles, and they are both strongly impacted by the mask developing process.
A new photomask develop tool (ACT-M) designed by Tokyo Electron Limited (TEL) has been installed at the Advanced Mask Technology Center (AMTC) in Dresden, Germany. This ACT-M develop tool is equipped with a standard NLD nozzle as well as an SH nozzle which are both widely used in wafer developing applications. The AMTC and TEL used the ACT-M develop tool to adapt wafer puddle develop technology to photomask manufacturing, in an attempt to capture the same optimum CD control enjoyed by the wafer industry. In this study we used the ACT-M develop tool to examine CD uniformity, local loading and defect control on P-CAR and N-CAR photomasks exposed with 50keV e-beam pattern generators. Results with both nozzle types are reported. CD uniformity, loading, and defectivity results were sufficient to meet 65-nm technology node requirements with these nozzles and tailored made develop recipes for photomask processing.