We report on progress towards a charge-based qubit using phosphorus atoms implanted in a silicon substrate. Prototype devices have been fabricated using standard lithographic techniques together with a new method of controlled single ion implantation using on-chip detector electrodes. Positional accuracy of the implanted ions was achieved using a nanoaperture mask defined using electron beam lithography. The two implanted phosphorus atoms are positioned ~50 nm apart, to form a qubit test device. A series of process steps has been developed to repair implant damage, define surface control gates, and to define single electron transistors used for qubit readout via the detection of sub-electron charge transfer signals. Preliminary electrical measurements on these devices show single charge transfer events that are resilient to thermal cycling.
By capactively coupling sensitive charge detectors (i.e. single-electron transistors - SETs) to nanostructures such as quantum dots and two-dimensional systems, it is possible to investigate charge transport properties in extremely low conduction regimes where direct transport measurements are increasingly difficult. Ion-implanted nano-MOSFETs coupled to aluminium SETs have been constructed in order to study charge transport between locally doped regions in Si at mK temperatures. This configuration allows for direct source-drain measurement as well as non-invasive charge detection. Of particular interest are the effects of material defects and gate control on charge transport, which is of relevance to Si-based quantum computing.
We report recent progress in single keV ion implantation and online detection for the controlled implantation of single donors in silicon. When integrated with silicon nanofabrication technology this forms the “top down” strategy for the construction of prototype solid state quantum computer devices based on phosphorus donors in silicon. We have developed a method of single ion implantation and online registration that employs detector electrodes adjacent to the area into which the donors are to be implanted. The implantation sites are positioned with nanometer accuracy using an electron beam lithography patterned PMMA mask. Control of the implantation depth of 20 nm is achieved by tuning the phosphorus ion energy to 14 keV. The counting of single ion implantation in each site is achieved by the detection of <i>e</i><sup>-</sup>/<i>h</i><sup>+</sup> pairs produced by the implanted phosphorus ion in the substrate. The system is calibrated by use of Mn K-line x-rays (5.9 and 6.4 keV) and we find the ionization energy of the 14 keV phosphorus ions in silicon to be about 3.5-4.0 keV for implants through a 5 nm SiO<sub>2</sub> surface layer. This paper describes the development of an improved PIN detector structure that provides more reliable performance of the earlier MOS structure. With the new structure, the energy noise threshold has been minimized to 1 keV or less. Unambiguous detection/counting of single keV ion implantation events were achieved with a confidence level greater than 98% with a reliable and reproducible fabrication process.
The construction of micro- and nano-scale electronic devices that exploit the properties of single atoms have been proposed. A very promising device is a silicon based solid state quantum computer based on an array of single <sup>31</sup>P atoms as qubits in a pure <sup>28</sup>Si substrate. Operation of the device requires independent control, coupling and readout of the state of individual qubits. We have developed a construction strategy for a few qubit device based on ion implantation of the qubits into prefabricated cells. An ion energy of less than 20 keV is necessary to ensure the ion range is at the required depth in the substrate which is of the order of 20 nm. Single ion impacts are registered by the electrical transient induced in an external circuit. Electron Beam Lithography fabricated cells, containing electrodes of the required nanometre scale, have been implanted with 14 keV <sup>31</sup>P ions and the pulse height spectrum of single ion impacts has been successfully recorded. Discrimination on the pulse height allows rejection of ions that suffer unacceptable straggling. This opens the way to the rapid construction of a two qubit device in the first instance that will test many of the essential mechanisms of a revolutionary solid state quantum computer.
We describe a novel technique for the fabrication of nanoscale structures, based on the development of localized chemical modification caused in a PMMA resist by the implantation of single ions. The implantation of 2 MeV He ions through a thin layer of PMMA into an underlying silicon substrate causes latent damage in the resist. On development of the resist we demonstrate the formation within the PMMA layer of clearly defined etched holes, of typical diameter 30 nm, observed using an atomic force microscope employing a carbon nanotube SPM probe in intermittent-contact mode. This technique has significant potential applications. Used purely to register the passage of an ion, it may be a useful verification of the impact sites in an ion-beam modification process operating at the single-ion level. Furthermore, making use of the hole in the PMMA layer to perform subsequent fabrication steps, it may be applied to the fabrication of self-aligned structures in which surface features are fabricated directly above regions of an underlying substrate that are locally doped by the implanted ion. Our primary interest in single-ion resists relates to the development of a solid-state quantum computer based on an array of <SUP>31</SUP>P atoms (which act as qubits) embedded with nanoscale precision in a silicon matrix. One proposal for the fabrication of such an array is by phosphorous-ion implantation. A single-ion resist would permit an accurate verification of <SUP>31</SUP>P implantation sites. Subsequent metalisation of the latent damage may allow the fabrication of self-aligned metal gates above buried phosphorous atoms.
We describe progress in a range of nanofabrication processes for the production of silicon-based quantum computer devices. The processes are based upon single-ion implantation to place phosphorus-31 atoms in accurate locations, precisely self-aligned to metal control gates. These fabrication schemes involve multi-layer resist and metal structures, electron beam lithography and multi-angled aluminium shadow evaporation. The key feature of all fabrication schemes is a gate pattern defined in a resist structure using electron beam lithography, used in conjunction with a second pattern written in another resist layer. The locations where the two patterns overlap define channels down to the substrate through which ions can be implanted, with the remaining metal/resist structure behaving as a mask. Further processing on the resist structures allows for deposition of the control gates and read-out structures. Central to this process is a new technique which allows for control of the implantation process at a single-ion level.