Via-first-trench-last (VFTL) has become a popular approach to dual damascene (DD) patterning, and via fill material is required to protect etch stop layer and to provide excellent substrate reflectivity control. It also has to be completely removed after trench-etch. Organic bottom anti-reflective coating (BARC) material became a good candidate for 130nm via fill, but its shell defects in via following trench etch cause significant yield loss, especially in 90nm process and beyond with low-k dielectrics. A new SiO2 based via fill material matches plasma etch rate to SiOCH, SiOF, and SiO2 inter-layer dielectrics and prevents shell defects. It is applied by spin coating with standard bake and also highly absorbing to suppress substrate reflectivity. In this paper we integrate this SiO2 based material into 90nm Dual Damascene process. Topics such as performance in spin coating, trench lithography, plasma etching, and selective removal by wet clean will be discussed.