Electron beam lithography is a promising technology for next generation lithography. Compared to optical
lithography, it has better pattern fidelity and larger process window. However, the proximity effect caused by the
electron forward scattering and backscattering in the resist and the underlying substrate materials has a severe influence
on the pattern fidelity when the required critical dimensions (CD) are comparable to the electron beam blur size.
Therefore, an accurate electron scattering model and a proper proximity correction play a vital role in electron beam
lithography. In this paper, we describe the model accuracy of electron scattering in terms of multiple Gaussian kernels
with an in-house proximity error correction to reduce proximity error with much better accuracy and more
self-consistency than the double Gaussian kernel on the 100-keV electron energies. The impact of various Gaussian
kernels used in the proximity correction on the lineation of typical patterns is also addressed.
Multiple e-beam direct write lithography (MEBDW), using >10,000 e-beams writing in parallel, proposed by
MAPPER, KLA-Tencor, and IMS is a potential solution for 20-nm half-pitch and beyond. The raster scan in MEBDW
makes bitmap its data format. Data handling becomes indispensable since bitmap needs a huge data volume due to the
fine pixel size to keep the CD accuracy after e-beam proximity correction (EPC). In fact, in 10,000-beam MEBDW, for a
10 WPH tool of 1-nm pixel size and 1-bit gray level, the aggregated data transmission rate would be up to 1963 Tera bits
per second (bps), requiring 19,630 fibers transmitting 10 Gbps in each fiber. The data rate per beam would be <20 Gbps.
Hence data reduction using bigger pixel size, fewer grey levels to achieve sub-nm EPC accuracy, and data truncation
have been extensively studied.
In this paper, process window assessment through Exposure-Defocus (E-D) Forest to quantitatively characterize the
data truncation before and after EPC is reported. REBL electron optics, electron scattering in resist, and resist acid
diffusion are considered, to construct the E-D Forest and to analyze the imaging performance of the most representative layers and patterns, such as critical line/space and hole layers with minimum pitch, cutting layers, and implant layers, for the 10-nm, and 7-nm nodes.
The eccentricity in the Optical Disk Drive (ODD) is the inevitable deviation of the geometric center of circular tracks from the rotating center of the disk. The resulted “runout” in the drive is thus periodic with disk rotation. To overcome the runout, conventional approach is for the pick-up head to go forward to the target track while shaking with the period runout during track accessing. This paper proposes an integration of the learning algorithm to learn the runout motion with an on-line observer to estimate the track runout during track accessing. The purpose is to allow for online computation of the target track kinematics so that the controller can adjust the accessing strategy to accommodate for the target track behavior. The proposed algorithm is demonstrated to be feasible through experiments applied to the fine jump control for a general optical storage opto-mechenical-electrical-control plant from OES in ITRI.
Proc. SPIE. 5643, Advances in Optical Data Storage Technology
KEYWORDS: Actuators, Optical design, Digital signal processing, Field programmable gate arrays, Control systems, Signal processing, Servomechanisms, Analog electronics, Algorithm development, Optical discs
Optical Disk Drives (ODD) uses chipsets to implement the various functions required in its operation. The chipsets always have fixed algorithm that make it impossible for the researches to carry out any experiments on newly developed algorithms. To overcome this difficulty, this study has constructed a test platform for the ODD experiments. This platform solution allows for software implementation of all the necessary functions in the CD/DVD system. The researchers can easily alter the software to change the existing functions of to implement new functions for different applications. The hardware of this development system is mainly composed of MSC-51, FPGA, DSK, AD/DA module, and an analog mother board. The MSC-51 is responsible for applying commands and setting functions, and it plays a role of master in the system. The TI DSK 6711, served as a slave, is responsible for implementing new algorithms and focus is mostly focused on servo control. The FPGA is responsible for handshaking among the DSK, the MSC-51, and the AD/DA module board; it also provides the register banks for the MSC-51 and the DSK. The purpose of the AD/DA module board is to establish communication link to the physical world. There are two A/D chips of eight channels and four D/A chips of four channels on the AD/DA module board. There are also a pre-amp chip and a driver on the analog mother board to amplify the signal on the ODD and to drive a DC motor. Users only have to change the pre-amp and ODD for different type of ODD.