The CCD star sensor is a kind of higher accuracy and more advanced technology of attitude sensitive equipment which observes fixed star as benchmark, and it is widely used on satellite attitude control system. It has many advantages which includes high precision, high sensitivity, no attitude accumulative error and so on. This paper describes how to design and develop a signal processing system (SPS) based on FPGA (Field Programmable Gate Array) for CCD star sensor. Above all, an integrated solution to a signal processing system is put forward briefly, which contains the design of system architecture and system function. Secondly, Some Key technologies of design and implementation are described in detail, which contain these designs of data stream, instructions stream, multi-clock data processing and triple modular redundancy (TMR). In practice, hardware and system tests have been carried out, and the results prove that the SPS is reliable and stable, and it has been used successfully in CCD start sensor.
HgCdTe focal plane array detector is a key component in infrared space camera. The scale of detector is enlarging continuously due to the unending requirements of better performance. HgCdTe plane array detector needs to work at deep cooling environment and it is encapsulated in dewar package. Support structure is used to support HgCdTe plane array detector in dewar. About 200K difference in temperature exits between the detector and the wall of dewar. In addition to certain support performance, the support structure should possess high adiabatic performance. Contradiction between support performance and adiabatic performance exists in the support structure of HgCdTe plane array detector, and it is intensified due to the scale enlarging of the detector. Then support technique of HgCdTe focal plane arrays based on fiberglass bundle is proposed. Adopting fiberglass bundle, the support performance of support structure is enhanced, but the adiabatic performance of support structure is not reduced obviously. The contradiction between support performance and adiabatic performance according to the support structure is resolved completely. At the end, assembly process of fiberglass bundle in support structure is introduced.
This paper describes how to design and develop an advanced Charge Coupled Device (CCD) timing generator which can obtain high precise CCD output signals. Above all, theory of the design and implementation of CCD timing generator is introduced based on Field Programmable Gate Array (FPGA) devices in detail. Secondly, it studies and analyzes the influencing factors that the waveform of CCD driving timing signals have on qualities of CCD output signals, which contain duty-cycle of HCCD clock, positive width of RST, signal-skew and delays among these signals. Then some skills are presented to improve and optimize the design in the phase of coding, compiling and placement and routing, which include code constraint, incremental placement and so on. Finally, simulation and verification of the design are performed with simulation tools, and hardware tests are carried out and experiment results are proved by oscilloscope.
This paper describes how placement and routing with manual intervention to improve the digital signal performance. According to studying and analyzing the features of Field Programmable Gate Array (FPGA) devices which include chip architecture and timing characteristics, a new approach is presented that some key logic modules can be relocated reasonably with manual intervention after completing successful place-and-route automatically. An example is given to illustrate this method. In this example, in order to improve remote sensing Charge Coupled Device (CCD) camera performance, signal-skew and delays among CCD driving timing signals must be controlled accurately and easily. This method can make CCD driving timing signals obtain the zero-skew which means tCO (clock to out) values for all these signals are equal, and finally hardware tests are carried out and experiment results are measured precisely by oscilloscope.