In photolithography, alignment is a critical step prior to exposure of wafers in the scanner. When the alignment light strikes onto the wafer alignment marks, the backward diffracted waves are collected and analyzed as alignment signal. In this case, robustness of the marks is very important as it determines the quality of the signal. Poor alignment signal results in unacceptable overlay which requires rework of the wafers. Wafer alignment marks are usually grating on the substrates which are formed during different masking layers. In this paper, modeling of wafer alignment mark is performed using Geometrical Theory of Diffraction (GTD). The model is developed to investigate light scattering problem in alignment marks particularly at the sidewall. GTD can be extended and applied in such a study due to the existing of wave-like properties of the diffracted components. The main interest here is to find diffraction coefficient that can be fit into the model to determine the backward diffracted waves. With this, different arbitrary angle of the mark sidewall can be studied besides a perfect step grating. The results also look into different consequences of marks, such as grating depth.
As the critical dimension (CD) in integrated circuit (IC) device reduces, the total overlay budget needs to be more stringent. Typically, the allowable overlay error is 1/3 of the CD in the IC device. In this case, robustness of alignment mark is critical, as accurate signal is required by the scanner’s alignment system to precisely align a layer of pattern to the previous layer. Alignment issue is more severe in back-end process partly due to the influenced of Chemical Mechanical Polishing (CMP), which contribute to the asymmetric or total destroy of the alignment marks. In this paper, the performance of different design of alignment marks on 0.10μm echnology wafer has been evaluated using ASML ATHENATM alignment system. For example, segmented marks with smaller dimensions in terms of width and length are used. Narrow marks are preferable due to the space constraint in the scribe lines. The width of NSPM has been shrunk down to 70% of the SPM and the length remains the same. It is a challenge to the alignment system to collect the NSPM signal and provide comparable alignment capability. The evaluations were completed using short loop wafers, which focus on back-end-of-line via and metal layers in a 90nm Cu dual damascene low k process. The results also look into the overlay performance using different alignment strategies. Offline overlay measurements were performed to verify the results.