Selective area epitaxial (SAE) growth of strained SiGe:B (Boron) in the recessed source/drain (S/D) region of an MOS device is known to improve Si-PMOS performance due to enhancement of hole mobility and reduction of S/D resistance. However, the process may be adversely affected by pattern loading effects, SiGe relaxation, dislocation formation, dopant precipitation and contamination. These effects, if not controlled, will deteriorate device performance and yield. A nondestructive, in-line SAE process monitoring approach on patterned wafers is especially desired. A specialized, contact-less, carrier lifetime-based Room Temperature - Photoluminescence (RT-PL) method meets this demand. The RT-PL tool, which uses a novel excitation path design to achieve carrier confinement, device-suitable probing depth, submicron scanning resolution and a micron probe size, offers a quick, non-destructive assessment of strain, defects and contamination for SAE. In this paper, a systematic evaluation of blanket and selective growth layers is illustrated using layers with a Ge content of 15-25%, undoped and B-doped at ~1020 cm-3 concentration. For the as-grown conditions, we observed that SiGe remains in an unrelaxed state without extended dislocations being formed. These results suggest that SiGe composition could be further modified to optimize the associated mobility enhancement. Uniformity variations associated with SiGe composition and B-doping were identified. Excessive boron precipitation, metallic particle-originated defects and large contamination regions induced by processing tools were also exposed. The multiple and unique insights enabled through the RT-PL technique provide significant benefits towards decreasing process development and integration time, maintaining SiGe process in control and reducing device fabrication costs.