A calibrated Optical Proximity Correction Model (OPC) allows the accurate prediction of wafer printing results based on
the geometrically defined layout of features. Therefore the OPC Model takes physical parameter of the mask, optical
parameter of the printing system and chemical parameter of the resist into account. In order to find a good correlation
between OPC simulated data and real wafer prints, the mentioned parameter needs to be calibrated. In the past, this
calibration was done based only on the wafer CD SEM measurements. To speed up the calibration process, this paper
investigates the possibility to use the aerial image measured by a wafer level critical dimension measurement tool
(WLCD) to shorten the feedback loop and to reduce the amount of wafer prints needed for calibration.
Assuming that all exposure tools on which a certain production reticle is being used are from same type and configuration it can be expected that the performance of the reticle should be independent from the exposing machines. When planning or performing arrangements for process transfer between different production sites or capacity expansion within one site performing a proximity matching between different exposure tools is a common activity. One of the objectives of a robust optical proximity correction (OPC) model is to simulate the process variation. Normally, the wafer critical dimension (CD) calibration of an OPC model is applied for one specific scanner first. In order to enhance the tolerance of the OPC model so called fingerprints of different scanners should be matched as closely as possible. Some examples of features for fingerprint test patterns are “critical dimension through pitch” (CDTP), “inverse CDTP”, “tipto-tip” and “linearity patterns”, and CD difference of disposition structures. All of them should also be matched as tightly as possible in order to reduce the process variation and to strengthen the tolerance of an OPC model. However, the focus difference between nested and isolated features which is directly influenced by different exposure tools and reticle layers will have an effect on the proximity matching of some patterns such as inverse CDTP and uniformly distributed disposition structures. In this manuscript the effects of focus differences between nested and isolated features for scanner proximity matching will be demonstrated. Moreover, the results for several scanners and different mask layers using advanced binary mask blank material will also be investigated. Even if some parts of the proximity features are closely enough to each other different parity proximity patterns will be affected by the focus difference between dense and isolated features. Because the focus difference between isolated and dense features is dependent on the illumination conditions, different mask layers applied for a proximity correction will lead to different results. The effects of source variations causing isolated and dense feature focus differences between scanners for 28 nm poly, 1X metal and contact layers will be illustrated.
Dummy pattern fill is added to a layout of a reticle for the purpose of raising the pattern-density of specific regions. The pattern-density has also an influence on different process-steps which were performed when manufacturing a reticle (e.g. proximity effect of electron beam exposure process, developer, and etch-processes). Although the reticle processes are set up to compensate the influence of the pattern density, dummy pattern can have an influence onto the reticle CD. When the isolated features become “nested” by insertion of dummy pattern, the reticle CD variation is even larger because nested features exacerbate the proximity effect of an electron beam. Another reason is that the etch ratio as well as the develop dynamics during the reticle manufacturing process are slightly dependent on the local pattern-density of pattern. With different dummy pattern around the main feature, the final reticle CD will be changed. Wafer CD of main feature is also dependant on the surrounding patterns which will induce different boundary conditions for wafer exposure.<p> </p>We have investigated three manufacturing sites for a 28nm first-metal layer reticle. Two of them were manufactured with a comparable process using the same advanced reticle binary blank material. For the third site a different reticle blank material with a relatively thin absorber layer thickness was used which was made with a comparable reticle process. The optical proximity correction (OPC) test patterns were designed with two different dummy patterns. The CD differences of the three reticles will be demonstrated for different dummy pattern and will be discussed individually. All three reticles have been exposed and the respective wafer critical dimension through pitch (CDTP) and linearity performance is demonstrated. Also the line-end performance for two dimensional (2D) structures is shown for the three sites of the reticle. The wafer CD difference for CDTP, linearity, and 2D structures are also discussed.
Among available lithography resolution enhancement techniques the Selective Inverse Lithography (SILT) approach
recently introduced by authors  has been shown to provide the largest process window on lower-NA exposure tools
for 65nm contact layer patterning. In present paper we attempt to harness the benefits of source mask optimization
(SMO) approach as part of our hybrid RET. The application of source mask optimization techniques further extends the
life-span of lower-NA 193nm exposure-tools in high volume manufacturing. By including SMO step in OPC flow, we
show that model-based SRAF solution can be improved to approach SILT process variation (PV) band performance.
Additionally to OPC, the complexity of embedded flash designs requires a high degree of exposure tool matching and a
lithography process optimized for topographically different logic and flash areas. We present a method how SMO can be
applied to scanner matching and topography-related optimization.
Selective Inverse Lithography (ILT) approach recently introduced by authors  has proven to be advantageous for
extending life-span of lower-NA 193nm exposure tools to achieve satisfactory 65nm contact layer patterning. We intend
to find an alternative solution without the need for higher NA tools and advanced light source optimization. In this paper
we explore possible region selection criteria for ILT application based on pitch for a full chip optical proximity
correction (OPC). Through studying the impact of a given selection criteria on runtime, resolution, and the process
window we recommend an optimal combination. With a justified choice of an ILT selection criteria, we construct a
hybrid OPC flow comprising a recursive sequence of direct assist features generation, selective ILT application, layout
repair, model OPC and hot spots screening.
In order to fulfill the demands of further shrinkage of our mature 90nm logic litho technologies under the constraints of
costs and available toolsets in a 200mm fab environment, a project called "Push to the Limits" was started. The aim ís
to extend the lifetime and capabilities of existing dry 193nm litho toolsets with medium to low numerical aperture,
coupled with the availability of materials and processes which were known to help up CD miniaturization and to shrink
the 90nm logic litho process as far as possible. To achieve this, various options were explored and evaluated, e.g.
optimization of illumination conditions, evaluation of new materials, usage of advanced RET techniques (OPC, LfD,
DfM and ILT) and resolution enhancement by chemical shrink (RELACS®). In this project we demonstrate how we were
able to extend our existing 90nm technology capability, down close to 65nm node litho requirements on most critical
layers. We present overall result in most critical layer generally and specifically on most difficult layer of contact.
Typical contact litho target at 100nm region was enabled, while realization of 90nm ADI target is possible with addition
of new process materials.
With escalating costs of higher-NA exposure tools, lithography engineers are forced to evaluate life-span extension of
currently available lower-NA exposure tools. In addition to common resolution enhancement techniques such as off-axis
illumination, edge movement, or applying sub-resolution assist features, Inverse Lithography Technology (ILT) tools
available commercially at this moment offer means of extending current in-house tool resolution and enlarging process
window for random as well as periodic mask patterns. In this paper we explore ILT pattern simplification procedures and
model calibration for a range of illumination conditions. We study random pattern fidelity and critical dimension
stability across process window for 65nm contact layer, and compare silicon results for both conventional optical
proximity correction and inverse lithography techniques.
The growing importance of mask simulation in a low-k1 realm is matched by an increasing need for numerical methods
capable of handling complex 3D configurations. Various approximations applied to physical parameters or boundary
conditions allowed a few methods to achieve reasonable run-times. In this work the theoretical foundation and
simulation results of an alternative 3D mask modeling method suitable for OPC simulations are presented. We have
established the throughput and accuracy of the Coupled-Dipole Simulation Method and have compared results to the
rigorous FDTD approach using a test pattern. We will discuss in detail possible approximations needed in order to
accelerate the method's performance.
Including etch-based empirical data during OPC model calibration is a desired yet controversial decision for OPC
modeling, especially for process with a large litho to etch biasing. While many OPC software tools are capable of
providing this functionality nowadays; yet few were implemented in manufacturing due to various risks considerations
such as compromises in resist and optical effects prediction, etch model accuracy or even runtime concern. Conventional
method of applying rule-based alongside resist model is popular but requires a lot of lengthy code generation to provide
a leaner OPC input. This work discusses risk factors and their considerations, together with introduction of techniques
used within Mentor Calibre VT5 etch-based modeling at sub 90nm technology node. Various strategies are discussed
with the aim of better handling of large etch bias offset without adding complexity into final OPC package. Finally,
results were presented to assess the advantages and limitations of the final method chosen.
In the recent year tools for DFM (Design for Manufacturing) addressing the lithographic pattern transfer like LfD have
evolved besides OPC (Optical Proximity Correction) to reduce the time required from design to manufacturing along the
design to mask data preparation flow. The insertion of ORC (Optical Rule Check) after OPC in a separate mask data
preparation step has been commonly adopted in order to successfully meet the ever increasing need of an advanced
technology node like 130nm, 90nm, 65nm and below. Separate simulation runs are normally done for both OPC and
ORC and it is not unusual that different platforms (software, hardware or algorithm) are used for OPC and ORC,
especially for better ORC processing throughput. An investigation has been made to look into the possibility of a DFMlite
approach by inserting ORC into the OPC run on the same Calibre platform. This is accomplished by adding
additional intelligence necessary to provide a 'polishing' step for a hotspot identified, without increasing the combined
cycle time but having the benefit of both full OPC and partial ORC in a single simulation run.
Optical & process model are used in conjunction with Mentors Calibre OPC tool to predict the behavior of a lithography process. Resist models rely exclusively on empirical measurement data, while optical models are calibrated based on the users knowledge of tool settings, but also fitting unknown parameters to empirical measurements. The final OPC model is a combination of optical & process behaviors prediction which includes resist & other process influence to meet the ever increasing demand of advanced lithography technology nodes like 90nm & below on model accuracy. Reliance of optical model creation on empirical measurement data is undoubtedly raising suspicion of how well the derived diffraction model is able to provide an accurate description of how light energy is distributed inside the resist. Various work & effort had been conducted in the past to cover defocus phenomenal on final model outcome & methodology introduced on better prediction from defocus to achieve better simulation quality, investigation has been carried out to study in further detail of existing strategy of resist & optical decoupling methodology in this work.