The mask is a known contributor to intra-field and local patterning fingerprints at the wafer level. Traditionally, a 3σ distribution of critical dimensions (CDs) on mask was sufficient to characterize the contribution to the CD distribution at wafer level. However, as edge placement error (EPE) and EUV wafer patterning stochastics become critical with decreasing feature sizes, wafer CD distributions are being characterized for statistics beyond 3σ. Additionally, Local Placement Error (LPE) is a critical metric that is expected to contribute to EPE. Consequently, it is imperative to understand, characterize and control the EUV mask contributors to the EPE budget. This work is an attempt to extensively characterize the CD and LPE distribution on an EUV mask and identify its impact at wafer level.
Over the past few years numerous advancements in EUV Lithography have proven its feasibility of insertion into High Volume Manufacturing (HVM).<sup>1, 2</sup> A lot of progress is made in the area of pellicle development but a commercially solution with related infrastructure is currently unavailable.<sup>3, 4</sup> Due to current mask structure and unavailability of a pellicle, a comprehensive strategy to qualify (native defects) and monitor (adder defects) defectivity on mask and wafer is required for implementing EUV Lithography in High Volume Manufacturing. In this work, we assess multiple strategies for mask and wafer defect inspection including a two-fold solution to leverage resolution of e-beam inspection along with throughput of optical inspection are evaluated. Defect capture rates for inspections based on full-die, critical areas based on priority and hotspots based on design and prior inspection data are evaluated. Each strategy has merits and de-merits, particularly related to throughput, effective die coverage and computational overhead. A production ready EUV Exposure tool was utilized to perform exposures at the IBM EUV Center of Excellence in Albany, NY for EUV Lithography Development along with a fully automated line of EUV Mask Infrastructure tools. We will present strategies considered in this study and discuss respective results. The results from the study indicate very low transfer rate of defect detection events from optical mask inspection. They also suggest a hybrid strategy of utilizing both optical and e-beam inspection can provide a comprehensive defect detection which can be employed in High Volume Manufacturing.
EUV lithography (EUVL) is the most promising solution for 16nm HP node semiconductor device manufacturing and
beyond. The fabrication of defect free EUV mask is one of the most challenging roadblocks to insert EUVL into high
volume manufacturing (HVM). To fabricate and assure the defect free EUV masks, electron beam inspection (EBI) tool
will be likely the necessary tool since optical mask inspection systems using 193nm and 199nm light are reaching a
practical resolution limit around 16nm HP node EUV mask. For production use of EBI, several challenges and potential
issues are expected. Firstly, required defect detection sensitivity is quite high. According to ITRS roadmap updated in
2011, the smallest defect size needed to detect is about 18nm for 15nm NAND Flash HP node EUV mask. Secondly,
small pixel size is likely required to obtain the high sensitivity. Thus, it might damage Ru capped Mo/Si multilayer due
to accumulated high density electron beam bombardments. It also has potential of elevation of nuisance defects and
reduction of throughput. These challenges must be solved before inserting EBI system into EUV mask HVM line.
In this paper, we share our initial inspection results for 16nm HP node EUV mask (64nm HP absorber pattern on the
EUV mask) using an EBI system eXplore® 5400 developed by Hermes Microvision, Inc. (HMI). In particularly, defect
detection sensitivity, inspectability and damage to EUV mask were assessed. As conclusions, we found that the EBI
system has capability to capture 16nm defects on 64nm absorber pattern EUV mask, satisfying the sensitivity
requirement of 15nm NAND Flash HP node EUV mask. Furthermore, we confirmed there is no significant damage to
susceptible Ru capped Mo/Si multilayer. We also identified that low throughput and high nuisance defect rate are critical
challenges needed to address for the 16nm HP node EUV mask inspection. The high nuisance defect rate could be
generated by poor LWR and stitching errors during EB writing of 64nm HP resist pattern. This result suggests we need
further improvements not only in the EBI inspection system but also the patterning processes for 16nm HP node EUV
Fabrication of defect free EUV masks including their inspection is the most critical challenge for implementing EUV
lithography into semiconductor high volume manufacturing (HVM) beyond 22nm half-pitch (HP) node. The contact to
bit-line (CB) layers of NAND flash devices are the most likely the first lithography layers that EUV will be employed for
manufacturing due to the aggressive scaling and the difficulty for making the pattern with the current ArF lithography.
To assure the defect free EUV mask, we have evaluated electron beam inspection (EBI) system eXplore™ 5200
developed by Hermes Microvision, Inc. (HMI) . As one knows, the main issue of EBI system is the low throughput.
To solve this challenge, a function called Lightning Scan™ mode has been recently developed and installed in the system,
which allows the system to only inspect the pattern areas while ignoring blanket areas, thus dramatically reduced the
overhead time and enable us to inspect CB layers of NAND Flash device with much higher throughput.
In this present work, we compared the Lightning scan mode with Normal scan mode on sensitivity and throughput. We
found out the Lightning scan mode can improve throughput by a factor of 10 without any sacrifices of sensitivity.
Furthermore, using the Lightning scan mode, we demonstrated the possibility to fabricate the defect free EUV masks
with moderate inspection time.
Fabrication of defect free EUV mask is one of the most critical roadblocks for implementing EUV lithography into
semiconductor high volume manufacturing for 22nm half-pitch (HP) node and beyond. At the same time, development
of quality assurance process for the defect free EUV mask is also another critical challenge we need to address before the
mass production. Inspection tools act important role in quality assurance process to ensure the defect free EUV mask. We
are currently evaluating two types of inspection system: optical inspection (OPI) system and electron beam inspection
(EBI) system [1, 2]. While OPI system is sophisticated technology and has an advantage in throughput, EBI system is
superior in sensitivity and extendability to even small pattern.
We evaluated sensitivity of EBI system and found it could detect 25 nm defects on 88nm L/S pattern which is as small
as target defect size for 23 nm Flash HP pattern in 2013 in 2009 ITRS lithography roadmap [2, 3]. EBI system is
effective inspection tool even at this moment to detect such small defects on 88nm HP pattern, though there are still
some challenges such as the slow throughput and the reliability. Therefore, EBI system can be used as bridge tool to
compensate insufficient sensitivity of current inspection tools and improve EUV mask fabrication process to achieve the
defect free EUV mask. In this paper, we will present the results of native pattern defects founded on large field 88nm HP
pattern using advance EBI system. We will also classify those defects and propose some ideas to mitigate them and
realize the defect free EUV mask, demonstrating the capability of EBI as bridge tool.
Readiness of defect-free mask is one of the biggest challenges to insert extreme ultraviolet (EUV) lithography into
semiconductor high volume manufacturing for 22nm half pitch (HP) node and beyond. According to ITRS roadmap
updated in 2008, minimum size of defect needed to be removed is 25nm for 22nm HP node in 2013 . It is necessary,
therefore, to develop EUV mask pattern inspection tool being capable of detecting 25nm defect. Electron beam
inspection (EBI) is one of promising tools which will be able to meet such a tight defect requirement.
In this paper, we evaluated defect detection sensitivity of electron beam inspection (EBI) system developed by
Hermes Microvision, Inc. (HMI) using 88nm half-pitch (HP) line-and-space (L/S) pattern and 128nm HP contact-hole
(C/H) pattern EUV mask. We found the EBI system can detect 25nm defects. We, furthermore, fabricated 4 types of
EUV mask structures: 1) w/ anti-reflective (AR) layer and w/ buffer layer, 2) w/ AR layer and w/o buffer layer, 3) w/o
AR layer and w/ buffer layer, 4) w/o AR layer and w/o buffer layer. And the sensitivity and inspectability for the EBI
were compared. It was observed that w/o AR layer structure introduce higher image contrast and lead to better
inspectability, although there is no significant different in sensitivity.
Nanoimprint lithography (NIL) is a candidate of alternative, low cost of ownership lithography solution for
deep nano-meter device manufacturing12. For the NIL template pattern making, we have been developing the processes
with 100keV SB EB writer and 50keV VSB EB writer to achieve the fine resolution of near 20nm1-7. However,
inspection of nanoimprint template posed a big challenge to inspection system due to the small geometry, 1x comparing
to 4x of Optical mask and EUV mask. Previous studies of nanoimprint template inspection were performed indirectly on
a stamped wafer and/or on a round quartz wafer13. Electron beam inspection (EBI) systems have been widely used in
semiconductor fabs in nanometer technology nodes. Most commonly EBI applications are electrical defects, or voltage
contrast (VC) defects detection and monitoring8-11.
In this study, we used a mask EBI system developed by Hermes Microvision, Inc. (HMI) to directly inspect a
NIL template with line/space and hole patterns half pitched from 22nm to 90nm and with program defects sized from
4nm to 92nm. Capability of inspection with 10nm pixel size has been demonstrated and capability of capturing program
defects sized 12nm and smaller has been shown. This study proved the feasibility of EBI as inspection solution of
nanoimprint template for 22nmHP and beyond.