Pixelwise integrated circuits involving a pixel-level analog-to-digital converter (ADC) are studied for 320 × 240
microbolometer focal plane arrays (FPAs). It is necessary to use the pixelwise readout architecture for decreasing the
thermal noise. However, it is hard to locate a sufficiently large integration capacitor in a unit pixel of FPAs because of
the area limitation. To effectively overcome this problem, a two step integration method is proposed.
First, after integrating the current of the microbolometer for 32&mgr;s, upper 5bits of the 13bit digital signal are output
through a pixel-level ADC. Then, the current of the microbolometer is integrated during 1ms after the skimming current
correction using upper 5bits in a field-programmable gate array (FPGA), and then lower 8bits are obtained through a
pixel-level ADC. Finally, upper 5bits and lower 8bits are combined into the digital image signal after the gain and offset
correction in digital signal processor (DSP)
Each 2×2 pixel shares an readout circuit, including a current-mode background skimming circuit, an operational
amplifier(op-Amp), an integration capacitor and a single slope ADC. When the current of a microbolometer is
integrated, the integration capacitor is connected between a negative input and an output of the op-Amp. Therefore a
capacitive transimpedance amplifier (CTIA) has been employed as the input circuit of the microbolometer. When the
output of a microbolometer is converted to digital signal, the Op-Amp is used as a comparator of the single slope ADC.
This readout circuit is designed to achieve 35×35&mgr;m<sup>2</sup> pixel size in 0.35&mgr;m 2-poly 3-metal CMOS technology.
In this paper, a novel high SNR readout circuit for a satellite TDI array is presented. Since an input range of an IR image for environmental satellites is broad and especially the cloud top temperature (CTT) that is important in understanding phenomena of atmosphere is quite low, the readout of low temperature signal is important in satellite applications. However, the noise resulted from a readout circuit is no longer ignorable compared to a detector shot noise at low IR radiation. Hence, an adaptive charge capacity control method is proposed in this paper for an improved SNR at low temperature. It is found that SNR is improved as much as 11dB at 200K and 90% background-limited infrared photodetection (BLIP) condition is satisfied over a total input range by simulation.
In this paper, a readout circuit (ROIC) utilizing a novel noise tolerant edge detection technique for InSb medium wavelength infrared focal plane arrays (MWIR FPAs) is studied. The use of a noise tolerant edge detection algorithm eliminates the need for a pixel-level non-uniformity correction circuit. In addition, the proposed circuit's simple structure allows the processing circuits to be integrated within a shared 2 by 2 pixel area. The proposed method shows better performance for the Gaussian and salt & pepper noise than other conventional approaches. A good edge map is obtained in general InSb MWIR detectors which have 99.5% operability and about 5% non-uniformity of the pixel current. Basic operation of the fabricated noise tolerant edge detection circuit is demonstrated.