The low-frequency noise behavior of nanoscaled fully-depleted silicon-on insulator (SOI) finFETs is investigated and the perspectives of the noise method as a non-destructive diagnostic tool are revealed. The analysis of the (1/f)γ McWhorter noise observed at zero back-gate voltage showed that the trap concentration Not appears to be lower in the case of devices with HfSiON/SiO2 gate dielectric with the uniaxial strain in the inversion channel while the implementation of the HfO2/SiO2 gate stack and the biaxial strain tend to increase the value of Not. The analysis of the back-gate-induced (BGI) and linear kink effect (LKE) Lorentzian noise observed when the back interface is biased in accumulation allowed to estimate the values proportional to equivalent capacitance Ceq. Their front-gate voltage dependencies appear to be different for the devices with HfSiON/SiO2 and HfO2/SiO2 gate dielectric. Also the values proportional to density of the electron-valence-band tunneling currents jEVB were found for the devices studied. The influence of the strain-inducing techniques and gate dielectric type on the values discussed is revealed.
In this paper, some new front-back coupling noise effects are described. They have been revealed in partially-depleted SOI MOSFETs under conditions where an accumulating voltage is applied to the back gate. The first effect consists in the appearance of a Lorentzian component in the noise spectra of the front channel current. The time constant for such Lorentzians which are observed in weak and strong inversion decreases with increasing amplitude of the back-gate voltage and is independent of the front-gate voltage. The second effect is the decrease of the amplitude and the turn-over frequency of the LKE noise Lorentzians that are present in the noise spectra due to the EVB tunneling currents. It is shown that the Lorentzians generated under conditions of an accumulating back-gate voltage and the LKE Lorentzians are analogous by their nature. A model is considered whereby the source of the Lorentzians entering the noise spectra in the presence of an accumulating back-gate voltage is the Nyquist noise voltage generated across the p+-n+ junction induced by the back-gate voltage at the source/back gate. The capacitive character of the source-body impedance is the reason for the Lorentzian shape of the noise component generated by those Nyquist fluctuations
As further enhanced functionalities of mobile equipment are predicted, the development of a CMOS technology that provides low-power, high-speed, and low-noise performance has become an urgent and hot issue. For these application driven technologies the complexity must be tackled at different levels to insure the optimisation of the area, the power consumption, the speed and the reliability. Therefore this paper present a review of the solutions implemented at different levels from system down to technology in order to reduce the contribution of the low frequency noise. These achievements are illustrated by experimental results from literature and are inserted in the general context of system design strategies for reducing the 1/f noise contribution.
In a first part dedicated to high-level system and circuit design, we introduce the noise reduction by switching techniques and the methodology for including the noise dispersion in scaled devices for the early design of analogue/RF circuits. In the second part, the 1/f noise is tackled at its origins i.e. the choice of the gate oxide and other critical process steps.
For time-critical industrial machine vision applications, a dedicated imager has been developed. The camera can be programmed to operate in several resolutions, by binning the signal charges of neighboring pixels on the sensor plane itself. Additionally the readout window was made programmable and an electronic shutter function was implemented. This square 256 X 256 imager was fabricated in a standard 1.5 micrometers CMOS technology. The readout occurs in two phases. After transferring in parallel a row of charges to 256 charge sensitive amplifiers, these signals are coupled to a single output amplifier. By controlling the sequence of addresses and reset pulses of the amplifiers, charges of different pixels are accumulated. This way multiple resolutions can be programmed. The imager is operated at data rates up to 10 MHz providing about 125 full images per second. At lower resolution, even higher frame rates are obtained. The signal to noise ratio is about 35 dB. This paper reports on the fixed pattern noise, response, speed and smear behavior of this imager.
The realization of an integrated, flexible, and robust CIM vision system, suitable for performing quality-assurance surface inspections is discussed. The optimized combination of advanced optics, optomechanics, and flexible image sensor realizes a high 'virtual resolution' without penalizing the pixel transfer rate. High computation rates are obtained by complementing the fractal inspection algorithm with a dynamic hologram, a modular data flow processor, and the system computer. The integrated vision system is validated for the surface quality inspection of concrete tiles in an industrial environment. The overall system performance is discussed in detail and the potential of the system for other application fields will be addressed.
A novel active vision system for CIM production and inspection applications has been developed in the framework of ESPRIT II project No. 5194 (CIVIS). The system consists of a unique, integrated combination of novel components: camera head, data acquisition electronics, a custom digital image processor, control hardware and a commercial framestore, all under the direction of control and processing software on a PC-486 platform. The camera head incorporates a fast zoom lens in combination with a pan/tilt mirror system, allowing region-of-interest acquisition. The special 256 X 256 MOS image sensor offers programmable resolution and random pixel access. The unique combination of optics, optomechanics and versatile image sensor has a high `virtual resolution,' corresponding to more than 1k X 1k pixels but without the overhead of a high pixel transfer rate. The fast computation of the algorithm employed for the fractal inspection of surfaces is realized with an unusual combination of an electrically switchable hologram (for performing all linear operations at the speed of light in the optical domain), a module-based digital processor and the host computer. In this way, active vision for the inspection of concrete tile surfaces has been implemented by acquiring only relevant image data and elegantly processing them in the most appropriate domain.
A narrow gap semiconductor layer grown directly on a Si-substrate is the preferable approach to realize large IR-focal plane arrays. We report on our new work on lead chalcogenide photovoltaic IR-detector arrays, grown monolithically on Si (111) substrates using a stacked CaF2/BaF2 buffer layer. The sensor fabrication process is described, and a simple thermal camera system is used to verify the functionality of our arrays. An epitaxial narrow gap lead chalcogenide layer of only 3 micrometers thickness is grown on an 0.3 micrometers thick CaF2/BaF2 buffer layer on Si (111), both using Molecular Beam Epitaxy. Photovoltaic IR-detectors are formed by deposition of a blocking Pb contact on the p-type semiconducting surface. We fabricated staggered linear sensor arrays with up to 2 X 128 pixels and with the cut off ranging from 3 to 12 micrometers . For demonstration, we built up a simple thermal camera using our detector arrays as the IR sensitive element. The read out is done using a new multiplexed direct injection device, capable to store large charge packages and offering individual biasing for each diode. The IR-diodes are fabricated monolithically on the completely finished readout chip.
A 512 pixel truly linear infrared (IR) charge coupled device (CCD) with Schottky barrier sensors and buttable edges has been developed, incorporating three different silicides working in the front-side illumination mode. The main differences between these silicides are the cut- off wavelength and the operating temperature. CoSi2 and NiSi show a cut-off wavelength of about 2.8 micrometers allowing an operating temperature of 150 K and passive cooling, whereas PtSi has a cut-off wavelength of about 6 micrometers working at 77 K. All three devices present a good photoresponse uniformity along the sensor row and also a good noise behavior.
Attention is given to a bilinear current integrating and multiplexing circuit with 2 x 128 inputs for direct monolithic coupling with TIR PbSnSe photovoltaic sensors which was designed and manufactured in a modified CMOS technology. Due to the low RA product of the detectors, the input circuitry was designed to accumulate and handle large charge packets. Charge reduction techniques such as partition, skimming, and mainly internal oversampling are implemented. The bias voltage of the individual detectors can be adjusted by implementating the switched capacitor network, and by controlling and adjusting the gate voltage of the direct injection stage. In addition to the analog part, the multiplexer chip also contains the digital circuit for generating the readout sequence.
Arranging the photosensitive elements of an imaging sensor in a log-polar grid automatically samples an image in a logpolar space. The Retina project is a chip with such a spatially varying layout that can produce the advantages of image processing in the new space at real-time speeds. The actual chip is a small part of a complete imaging system. The system is part of a class of imagers called foveal sensors and these sensors have distinct and significant computational savings over conventional imagers as many as 3-10 orders of magnitude improvement in processing time and memory. The design maintains a large region of high-resolution data although it is still only a fraction of the total photosensitive area.
The utilization of both cobalt and nickel silicides as Schottky detectors is presented with both theoretical and experimental supporting data. The uses considered are limited to those with a typical cut-off frequency of more than 2.2 microns, such as earth observation and satellite imaging spectroscopy. The theoretical calculations of key parameters of Schottky-barrier detectors are discussed, including quantum efficiency, the dark current, and the noise. Experimentally, Co and Ni layers were tested on silicon wafers at a variety of temperatures and layer thicknesses. Average values for the barrier height, activation analysis, and quantum efficiency are given and compared. The dark current for both Ni and Co is shown to be negligible below 140-160 K, and Ni quantum efficiencies are higher than those for Co, as is the measured barrier height. The theoretical and technological requirements are met by both cobalt and nickel silicides. The characteristics tested show that Ni and Co silicides are appropriate for realizing large focal planes with high dark current and responsivity homogeneity.
The retina is a smart sensor, but in the sense of intelligent design and not on-chip computing power. It uses a unique
layout and elementary charge computing elements to implement in hardware a polar-exponential transform on visual data.
The final chip includes a large section of photosites arranged in a circular pattern. Further, the pixels grow m size as radial
distance increases. The retina also has a fovea (a high resolution area at the chip's center) and the computational circuitry.
The sensor works and will serve as the key component of a real-time imaging system.