As we move towards convergent 4G Wireless encompassing both 3G cellular (WCDMA) for wide area networks and Wireless LAN for ”hot-spots”, the development of low power, low cost multi-band multi-standard wireless chipset solutions is a must. To this end this paper presents a programmable architecture for an analog baseband
chain intended for use in a zero-IF multi-standard WCDMA/WLAN(802.11b) radio receiver. It also addresses the DC offset cancellation in the baseband chain. This is one of the major impairments in zero-IF receivers whose simplicity makes them suitable for single-chip multi-standard designs but where DC offset can reduce the receiver performance if a proper DC offset cancellation scheme is not devised. System level design of the baseband chain is given leading to design specifications of the different blocks in the chain. Extensive simulations carried out in
MATLAB/SimuLink at the system level and in Cadence design tools at the circuit level show the performance of the system. The circuits will be fabricated in a 0.18<i>μm</i> CMOS process for a 1.8 V power supply.