The two key factors in EUV lithography imaging will be flare and shadow effect among other issues. The flare which is
similar to the long range density loading effect and also known to be of high level will generate CD variation throughout
the exposure field while the EUV specific shadow effect differentiates H-V CDs along the slit. The long range character
of flare in EUV full field scanner can even affect CDs in the neighboring fields. It seems to be apparent that the major
imaging challenges for EUV lithography to be successfully adopted and applied to device manufacturing will be
determined by how smartly and effectively CD variations induced both by flare and shadow effect in the full chip level
are compensated. We investigated and assessed the previously proposed full chip level compensation strategies of the
flare and shadow effect in EUVL for the application to memory device both by simulation and experiments on the
condition of full field scanner. The effectiveness of flare compensation for the case of thin absorber mask was also
addressed together with related impact on the shadow induced H-V CD bias.
Extreme ultraviolet lithography (EUVL) is one of the leading candidates for next-generation lithography technology for
the 32 nm half-pitch node and beyond. We have evaluated the Alpha Demo Tool(ADT) characterizing for mixed-andmatched
overlay(MMO), flare noise, and resolution limit. For process integration, one of the important things in EUVL
is overlay capability. We performed an overlay matching test of a 1.35NA and 193 immersion tool using a low thermal
expansion material(LTEM) mask. We also investigated the flare level of the EUV ADT for device applications. The
current EUV tool has a higher flare level than ArF lithography tools. We applied a contact layer for 40nm node device
integration to reduce the variation in critical dimension(CD) from the flare noise.
As VLSI products are being developed rapidly, design rules of semiconductor devices are correspondingly shrinking. Therefore, the electric couplings between adjacent lines are increasing and this phenomenon requires control of critical dimension uniformity (CDU) more tightly. In addition to that, the development of lithography tool for sub- 40nm design rule (D/R) is being delayed, which makes most IC manufacturer drive double patterning technology (DPT) as next generation lithography (NGL) solution. CD control is one of critical issues to implement DPT for mass production, because CD of 1st pattern affects the formation of 2nd pattern seriously so that the uniformity of 1st pattern is more important.
In this paper, the improvement of CD uniformity is investigated, especially for 3Xnm flash device for where double patterning technique is applied. Several methods have been considered or evaluated to improve CD uniformity. Among them, DoseMapperTM of ASML shows promising results. Using this system, in field uniformity (IFU) & in wafer uniformity (IWU) are improved 14% in 3&sgr;. To be implemented as a technology for mass production and to maintain the best performance, several efforts in terms of metrology and process will be further discussed in this paper.
Flare in EUV mirror optics has been reported to be very high and long range effect due to its character which is inversely
proportional to the 4th order of wavelength. The high level of flare will generate CD (Critical Dimension) variation
problem in the area where the gradient of aerial pattern density is large while the long range influencing character would
confront an issue of computational challenge either for OPC (Optical Proximity Correction) modeling or for any other
practical ways to accommodate such a long range effect. There also exists another substantial challenge of measuring
and characterizing such a long range flare accurately enough so that the characterized flare can successfully be used for
the compensation in the standard OPC flow.
Although EUV lithography has been prepared for next generation litho-technique for several years, there are still lots of
obstacles on its way. Especially, phase defect from the mask, and immaturity in the resist should be solved as soon as
possible because they are directly related to realizing patterns on the wafer. ASET has been focusing on these two
problems, that is, the mask-related defect control and the resist screening for EUV application. In this study, we
concentrate on the resist evaluation for the EUV lithography application, mainly commercial CAR (Chemically-
Amplified Resist) type resist, for example, ArF resist based on polymethacrylate and KrF resist based on poly(4-
hydroxystyrene) (PHS). We screened tens of resists in viewpoint of resolution, photo-speed, and LWR (Line Width
Roughness). We used two METs (Micro-Exposure Tools). The one is HiNA in ASET and the other is MET in Lawrence
Berkeley National Lab. (LBNL) to evaluate resist. And we used EUV masks fabricated by DNP and ASET. Some resist
showed modulation on the wafer for 28nm-hp line and space pattern and some resist showed very high photo-speed
about 5mJ/cm<sup>2</sup>. Photo-speed could be improved about 25% by controlling the amount of additives, PAG and quencher.
However, improvement in photo-speed caused degradation in resolution. This means there are trade-off relation
between resolution and photo-speed. And we also evaluated polymer-bound PAG resist, which showed new possibility
for EUV resist. And we encountered unexpected problem, pattern lifting, which was solved by using bufferlayer to
increase attachment force between resist and wafer surface. We conclude that polymer bound PAG resist is a good
approach to lower LWR of resist for EUVL application and bufferlayer tuning and matching with resist is also needed
for low LWR. The EUVL masks were fabricated by Dai Nippon Printing Co., Ltd. The HiNA set-3 projection optics
were developed and provided by Nikon Corporation. This work was supported by NEDO.
Arrays of rectangular patterns of various sizes were printed with the EUV micro-exposure tool (MET) at the
Lawrence Berkeley National Laboratory (LBNL) using the chemically-amplified resist MET-1K; and their fidelity to the
mask patterns was evaluated. The experimental results showed that the shortening of resist patterns in the lengthwise
direction was greater for smaller patterns. For example, the line-end shortening of half-pitch (hp) 45-nm patterns was
about 20-25 nm on one side, while that of hp-90-nm patterns was less than 10 nm. However, simulated aerial images
exhibited little shortening, even for hp-45-nm patterns. On the other hand, considerable shortening appeared in hp-45-nm
patterns after post-exposure-baking (PEB) process. When the acid diffusion length in the PEB process was assumed to be
20 nm, the calculated shapes of resist patterns agreed well with the experimental results for various sizes. Printing
experiments showed that lowering the PEB temperature improved fidelity, probably due to the shorter acid diffusion
length. Thus, we concluded that acid diffusion is the main cause of shortening in rectangular patterns printed with the
MET. For better pattern fidelity, the acid diffusion length must be reduced in accordance with the reduction in pattern
We evaluated TaSix-based bi-layer absorber on ZrSi-based buffer for EUV mask, especially
considering the possibility of ZrSi-based film as a combined buffer and capping layer. Since
ZrSi-based film has both high dry-etching resistance and EUV transparency, it has potentiality to
work as a combined capping and buffer layer. AFM machining repair of bi-layer TaSix absorber
on ZrSi-based buffer can be performed to good profile. Printing evaluation showed that
over-repair into buffer layer did not affect significantly to wafer CD. FIB (10keV) repair of
bi-layer TaSix absorber on ZrSi-based buffer needs improvement for side-wall profile and
distinguishable evaluation from implanted Ga<sup>+</sup> effect in more detail. Effect of FIB (10keV) scan
with ordinary repair process seems to be at least smaller than 10%.
Although 50-56-nm contact-hole (C/H) patterns will be required in 2010, it is very difficult to fabricate such small C/H pattern by optical lithography. Since extreme-ultraviolet lithography (EUVL) uses a much shorter wavelength than optical lithography, it should provide better image contrast. We have installed a high-numerical-aperture (NA = 0.3) small-field EUV exposure tool (HiNA) and are now evaluating the printability of various kinds of patterns. In this study, C/H patterns with sizes of 50-150 nm were printed using the HiNA optics under the annular illumination (σ=0.5-0.8), and the printability was assessed. Fine C/H patterns, such as dense 55-nm C/H and isolated 50-nm C/H, were successfully fabricated using a binary mask without optical proximity correction. The slope of the mask linearity was about 1.0-3.0 for dense C/H (mask CD: 80-150 nm) and about 1.0-4.0 for isolated C/H (mask CD: 90-150 nm). Simulation results indicate that the aberration, the flare and the central obscuration of the HiNA optics considerably degraded the aerial images of fine C/H patterns. They also indicate that annular illumination (σ=0.5-0.8) is not suitable for obtaining good mask linearity in C/H patterns. A smaller central obscuration, less aberration, less flare and the optimization of σ should improve the resolution limit and mask linearity for C/H patterns.
Since device makers must use the lowest cost process for their survivals, they will want to use their old refractive litho-tools such as ArF and KrF. They will want to extend their refractive optical paradigm by using the immersion lithography. However, simulation results show that it is difficult or impossible to print sub-30nm patterns using immersion without resolution enhancing techniques, for example, double exposure. Therefore EUV is a promising candidate to prepare the next generation litho-technique. ASET is focusing all efforts on developing EUV mask and EUV resists. In this paper, we have focused on and evaluated resists for EUV lithography targeting sub-30nm patterning. The resists we evaluated were mainly chemically amplified resist for KrF and ArF and new type of resist for EUV. And we also tuned resists with solution and additives. We also checked several properties such as LWR (Line Width Roughness), minimum resolutions, and sensitivity curves. Several candidates have shown potentialities for EUV resists. In present, EUV resist is not perfect and has unsolved problems such as outgassing and low speed, but it will be also improved as soon as ArF and KrF have been done.
To find resists having high resolution accompanied with good sensitivity and small LER is a big issue in EUV lithography to make path for volume manufacturing. We have started screening of resists by using high numerical aperture (NA) micro-exposure tool HiNA. Some of the results within 29 evaluated resists, including commercial and non-commercial, are presented with the consideration of relationship between optical conditions. The results obtained by another high NA micro-exposure tool MET located Berkeley National Laboratory are also shown and compared with the results by HiNA. In both exposure tools, down to 28 nm dense patterns were replicated but the LER was about 4 nm at best showing the requirement for further works
As DRAM (Dynamic Random Access Memory) device continuously decreases in chip size, an increased speed and more accurate metrology technique is needed to measure CD (critical dimension), film thickness and vertical profile. Scatterometry is an optical metrology technique based on the analysis of scattered (or diffracted) light from periodic line and space grating and uses 2θ angular method (ACCENT Optical Technologies CDS-200). When a light source is irradiated into the periodic pattern, the scattered intensity signal of zero-th order as a function of incident angle is measured. By analyzing these scattered signals, various parameters of the periodic pattern such as CD, vertical profile, mapping of substrate structure, film thickness and sidewall angle can be determined. Advantages of scatterometry are that drastic decreased measuring time and acquirement of CD, vertical profile, film thickness and sidewall angle by just one measurement. In this paper we will discuss various applications of scatterometry to sub-100nm DRAM structures of straight line and space and curved line and space patterns. Details of the correlation with CD-SEM (Scanning Electron Microscope) of standard metrology tool and repeatability of measured CD values will be discussed. As diverse applications, results of in-field, in-wafer and wafer-to-wafer CD monitoring, STI (Shallow Trench Isolation) depth monitoring and matching of vertical profile with V-SEM (Vertical SEM) will be also presented.
Recently, the design rule shrinkage of DRAM devices has been accelerated. According to International Technology Roadmap for Semiconductor (ITRS) 2001, 90 nm node will start in 2004. For this achievement, lithography has been standing especially in the forefront and leading the ultra fine patterning technologies in the manufacturing of semiconductor devices. We are now in the moment of transition from the stronghold of KrF to the prospective of ArF. In this paper, we applied ArF process to the real DRAM devices of 90nm node. We proved good pattern fidelity and device performance. The ArF process, however, has still some weak points - resist shrinkage and LER (Line Edge Roughness). Resist shrinkage is very crucial problem for measuring CD. To overcome it, we applied ASC (Anti-Shrinkage Coating) process to ArF resist and improved the CD measurement. LER also becomes an issue, as the design rule is shrink. It is found that they are very dependent on resist type. However, it could be cured effectively by VUV treatment. Finally we will mention the current status of low k1 factor and the future lithographic strategy of which technologies will be most feasible based on current situation.