As technology nodes continue to shrink, layout patterns become more sensitive to lithography processes, resulting in lithography hotspots that need to be identified and eliminated during physical verification. We propose an accurate hotspot detection approach based on principal component analysis-support vector machine classifier. Several techniques, including hierarchical data clustering, data balancing, and multilevel training, are provided to enhance the performance of the proposed approach. Our approach is accurate and more efficient than conventional time-consuming lithography simulation and provides a high flexibility for adapting to new lithography processes and rules.
Parallel-coupled dual racetrack micro-resonator structures have potential applications for quadrature amplitude
modulation. Fabrication of parallel-coupled dual racetrack silicon micro-resonators was conducted, while overcoming
for some barriers to fabrication. Fabrication process limitations and design considerations are discussed. Fabrication
results are presented. Some barriers to fabrication include stitching and overdosing in electron beam lithography. A
multi-input and output test bed with optical and electrical control was necessary for device characterization. The
characterization of the fabricated devices is presented, along with the related procedures. Some of the tests performed are
wavelength scans and top surface scans.
In this manuscript we study the potentials of nanophotonics on-chip integration and propose a set of automation
methodologies to construct low power on-chip interconnect with flexible geometry shapes. We show that with
such techniques, a systematic design aid environment can be developed to generate optimized integration configurations
meanwhile honoring complex sets of photonic device constraints. Due to their unique characteristics, not
only do these techniques benefit the optimization of on-chip photonic networks, but also they can be efficiently
applied to build low-power high-throughput application specific ICs with opto-electrical interconnection.