We present a theoretical model for two high-throughput optical logic methodologies, using voltage-induced free-carrier dispersion and stimulated Raman scattering based Zeno switching. Increased computational throughput is achieved by accessing higher switching speeds, optimizing the use of space, and by using multiple wavelengths for parallel processing. The condition of CMOS compatibility is maintained to take advantage of the high-volume, low-cost manufacturing potential of the industry and to help lower each design's spatial footprint (enabled by the high refractive index contrast of silicon-on-insulator waveguides and resonators). Each design is made with the potential of higher-order operations in mind; for their use must not only stand alone, but must also have the ability to incorporate into future all-optical or optoelectronic computational devices.
For decades, the semiconductor industry has been steadily shrinking transistor sizes to fit more performance into a single silicon-based integrated chip. This technology has become the driving force for advances in education, transportation, and health, among others. However, transistor sizes are quickly approaching their physical limits (channel lengths are now only a few silicon atoms in length), and Moore's law will likely soon be brought to a stand-still despite many unique attempts to keep it going (FinFETs, high-k dielectrics, etc.). This technology must then be pushed further by exploring (almost) entirely new methodologies. Given the explosive growth of optical-based long-haul telecommunications, we look to apply the use of high-speed optics as a substitute to the digital model; where slow, lossy, and noisy metal interconnections act as a major bottleneck to performance. We combine the (nonlinear) optical Kerr effect with a single add-drop microring resonator to perform the fundamental AND-XOR logical operations of a half adder, by all-optical means. This process is also applied to subtraction, higher-order addition, and the realization of an all-optical arithmetic logic unit (ALU). The rings use hydrogenated amorphous silicon as a material with superior nonlinear properties to crystalline silicon, while still maintaining CMOS-compatibility and the many benefits that come with it (low cost, ease of fabrication, etc.). Our method allows for multi-gigabit-per-second data rates while maintaining simplicity and spatial minimalism in design for high-capacity manufacturing potential.