We have developed a simple and cost-effective data sharing system between fabs for lithography
advanced process control (APC). Lithography APC requires process flow, inter-layer information,
history information, mask information and so on. So, inter-APC data sharing system has become
necessary when lots are to be processed in multiple fabs (usually two fabs). The development cost
and maintenance cost also have to be taken into account. The system handles minimum information
necessary to make trend prediction for the lots. Three types of data have to be shared for precise
trend prediction. First one is device information of the lots, e.g., process flow of the device and
inter-layer information. Second one is mask information from mask suppliers, e.g., pattern
characteristics and pattern widths. Last one is history data of the lots. Device information is
electronic file and easy to handle. The electronic file is common between APCs and uploaded into
the database. As for mask information sharing, mask information described in common format is
obtained via Wide Area Network (WAN) from mask-vender will be stored in the mask-information
data server. This information is periodically transferred to one specific lithography-APC server and
compiled into the database. This lithography-APC server periodically delivers the mask-information
to every other lithography-APC server. Process-history data sharing system mainly consists of
function of delivering process-history data. In shipping production lots to another fab, the
product-related process-history data is delivered by the lithography-APC server from the shipping
site. We have confirmed the function and effectiveness of data sharing systems.
We have proposed a new algorithm of Lithography Advanced Process Control System for high-mix low-volume production. This algorithm works well for 1<sup>st</sup> lot of a new device input into the production line, or 1st lot of an existing device to be exposed with a newly introduced exposure tool. The algorithm
consists of 1) searching the most suitable trend of other similar devices referring to an attribute table and
a look-up table for priority of searching order, and 2) correction of differences between the two devices for deciding optimum exposure conditions. The attribute table categorizes same layers across different devices and similar layers within a device. Look-up table describes the order of searching keys. To attain cost-effective process control system, information useful to compensate referred trend is compiled into the database.
To attain quick turn-around time (TAT) and high yield, it is very important to remove all the problems affecting the semiconductor volume production line. For this purpose, we have used a lithography management system (LMS) as an advanced process control system. The LMS stores the critical dimension and overlay inspection results as well as the log data of the exposure tool in a relational database. This enables a quick and efficient grasp of the productivity under the present conditions and helps to identify the causes of errors. Furthermore, we developed a mining tool, called a log data extraction and correlation miner (LMS-LEC), for factor analysis on the LMS. Despite low correlation between all data, a high correlation may exist between parameters in a certain data domain. The LMS-LEC can mine such correlations easily. With this tool, we can discover previously unknown error sources that have been buried in the vast quantity of data handled by the LMS and thereby increase of the effectiveness of the exposure and inspection tool. The LMS-LEC is an extremely useful software mining tool for “equipment health” monitoring, advanced fault detection, and sophisticated data analysis.
Modern overlay metrology tools achieve the required metrology accuracy by controlling critical asymmetries in the imaging optics, and by compensating for the remaining asymmetries through TIS-calibration. We extend our study on the TIS-WIS interaction in stepper alignment optics to the overlay metrology tool, and propose a new method for characterizing residual TIS. This method is based on the examination of the through-focus behavior of the metrology tool on a wafer with a simple, TIS-sensitive structure.
We have proposed a methodology for 130-nm DRAM patterning. We started by running a simulation to investigate the possibility of 130-nm DRAM production with KrF lithography. We optimized cell array features and isolate lines in the core circuits and peripheral circuits, corresponding to resist performance ((Delta) L). Using a half-tone phase-shift mask, off-axis illumination, and 0.68-NA KrF scanner, we found a high-performance resist of 40-nm (Delta) L that meets the requirement. Then, we screened resist samples using design of experiment. The result was a 40-nm (Delta) L positive resist that has small line edge roughness, a high- contrast resist profile, a small iso-dense bias and a low- blocking level to prevent defects. Finally, we applied this positive resist and OPC-mask to critical layers and achieved a sufficient production margin using a 0.68-NA KrF scanner.
Anti-reflection technology is necessary for controlling line widths. Minimization of the line width deviation in the gate layer is particularly important for improving yields and stabilizing device performance. We have developed a novel anti-reflection effect monitor (AREM) for the optimization of anti-reflection coating materials. Generally, the anti-reflection effect is quantified as the amplitude of the resist sensitivity curve against the resist thickness on an anti- reflection coated substrate. In AREM, a sample wafer is prepared with a gate structure and LOCOS step. Then anti-reflection material is deposited on the wafer and resist is subsequently coated on it. Here, the resist thickness changes gradually away from the step. Hundreds of isolated lines are patterned parallel to the LOCOS step at 0.1 micrometers intervals away from the step. Then each line's width is measured with an electrical probe and the curve of the line width versus the distance from the step is obtained, corresponding to the resist sensitivity curve against resist thickness. AREM is very accurate and can quantify the anti-reflection effect as a line width deviation.