Proc. SPIE. 8680, Alternative Lithographic Technologies V
KEYWORDS: Electron beam lithography, Point spread functions, Electron beams, Polymethylmethacrylate, Scattering, Silicon, Monte Carlo methods, Image quality, Software development, Critical dimension metrology
Image contrast of line-cut and contact hole features patterned using Complementary E-Beam Lithography (CEBL) at
advanced technology nodes are analyzed. The study assumes one beam in each column is used to pattern features less
than 20 nm (Full Width Half Maximum, FWHM), consistent with Multibeam’s multi-column vector-scan approach for
CEBL patterning. When the feature size approaches the resolution of the e-beam column design, the dose intensity
profile follows a Gaussian model. Using Gaussian profiles, the image contrast of line cut or contact hole features can be
studied as a function of beam FWHM size, spacing between features, and proximity effect. As expected, the image
contrast was dominated by contact hole stepping distance (i.e., spacing between neighboring contact holes) and
proximity effect. The plot of image contrast versus contact position becomes very useful in studying the impact of
contact spacing, proximity effect and process window in writing line-cut or contact features in CEBL applications. Based
on a given design rule of contact hole size and spacing, we can determine the appropriate e-beam size and resist contrast
to achieve good image contrast. The relationship between resist contrast and image contrast is discussed to estimate the
process window in CEBL applications. Finally, the impact of electron forward scattering in resist is analyzed, including
the effects of resist thickness and beam voltage selections. We determined that the influence of back scattered electrons
is not a significant factor in CEBL applications when feature pattern density is less than 11%.
Single-column e-beam systems are used in production for the detection of electrical defects, but are too slow to be used
for the detection of small physical defects, and can't meet future inspection requirements. This paper presents a multiplecolumn
e-beam technology for high throughput wafer inspection.
Multibeam has developed all-electrostatic columns for high-resolution imaging. The elimination of magnetic coils
enables the columns to be small; e-beam deflection is faster in the absence of magnetic hysteresis. Multiple miniaturecolumns
are assembled in an array. An array of 100 columns covers the entire surface of a 300mm wafer, affording
simultaneous cross-wafer sampling. Column performance simulations and system architecture are presented. Also
provided are examples of high throughput, more efficient, multiple-column wafer inspection.
Developers of e-beam lithography systems are pursuing diverse strategies to bolster throughput. To achieve parallelism,
some e-beam efforts focus on building multiple-columns, and others focus on developing columns with multiple
beamlets. In this paper, we discuss the benefits and throughput of a multiple column approach for a particular
application: Complementary E-Beam Lithography (CEBL). CEBL is a novel approach where the e-beam lithography
system is used only to pattern the smallest features. Everything else is patterned with existing optical lithography
equipment. By working hand-in-hand with optical lithography, CEBL provides an urgently needed solution to create
next-generation microchips. Moreover, CEBL is extendable for multiple technology generations. We show how a
multiple column approach is the best way to meet the requirements for CEBL, including high throughput, high resolution
and overlay accuracy, without excess complexity or cost.
We present an analysis of the performance of an all electro-static electron-beam column designed for CEBL
(Complementary Electron Beam Lithography). To meet the requirements of CEBL at advanced technology nodes (16
nm half-pitch and beyond), a beam size of < 20 nm FWHM (Full Width Half Maximum) and overlay accuracy of < 4 nm
are needed. Beam current and beam energy must be optimized to achieve these specifications while meeting throughput
requirements. In this paper, we present an in-depth analysis of the resolution of Multibeam's electron beam column as a
function of beam energy. We focus on an analysis of beam energy below 30 keV, to avoid wafer heating and improve
overlay accuracy. The beam size is analyzed with respect to aperture size and current. Spherical aberrations, chromatic
aberrations and other effects at various beam energy levels are analyzed. At 7.5 or 5 keV beam energy, the 2 dominating
factors in the beam spot size are the image size of the virtual source of the TFE (thermal field emitter) electron gun,
chromatic and spherical aberrations. Performance of the column and process window to meet patterning requirements will be discussed.
The semiconductor industry is moving to highly regular designs, or 1D gridded layouts, to enable scaling to advanced
nodes, as well as improve process latitude, chip size and chip energy consumption.
The fabrication of highly regular ICs is straightforward. Poly and metal layers are arranged into 1D layouts. These 1D
layouts facilitate a two-step patterning approach: a line-creation step, followed by a line-cutting step, to form the desired
IC pattern (See Figure 1).
The first step, line creation, can be accomplished with a variety of lithography techniques including 193nm immersion
(193i) and Self-Aligned Double Patterning (SADP). It appears feasible to create unidirectional parallel lines to at least
11 nm half-pitch, with two applications of SADP for pitch division by four. Potentially, this step can also be
accomplished with interference lithography or directed self assembly in the future.
The second step, line cutting, requires an extremely high-resolution lithography technique. At advanced nodes, the only
options appear to be the costly quadruple patterning with 193i, or EUV or E-Beam Lithography (EBL).
This paper focuses on the requirements for a lithography system for "line cutting", using EBL to complement Optical.
EBL is the most cost-effective option for line cutting at advanced nodes for HVM.
Proc. SPIE. 7970, Alternative Lithographic Technologies III
KEYWORDS: Chromatic aberrations, Electron beam lithography, Electron beams, Scattering, Laser scattering, Monte Carlo methods, Thermal effects, Electron beam direct write lithography, Spherical lenses, Semiconducting wafers
As critical dimensions in Logic chips continue to shrink, EBDW (E-Beam Direct Write) will play a growing role.
EBDW is capable of patterning 2D shapes at extremely high resolution. EBDW will pattern low-density critical wafer-layers,
complementing optical lithography in high volume manufacturing.
E-beam landing energies ranging from 5 keV to 100 keV are used in EBDW today. The choice of e-beam energy effects
resolution, throughput and overlay errors due to thermal effects.
We present an analysis of the tradeoffs of various e-beam landing energies. We examine 5 keV, 7.5 keV, 10 keV, 20
keV and 50 keV. We use a simple column design and SIMION 8 simulation software. SIMION 8 (from Scientific
Instrument Services, Inc.) is used for electrostatic lens analysis and charged particle trajectory modeling
1. Resolution (beam dose profile in resist)
2. Overlay errors due to thermal effects (beam power)
Low energy EBDW has advantages in resist sensitivity and thermal control. Its disadvantages include lower beam
current and a requirement for very thin resist.
High energy EBDW has advantages in beam current and resolution. Its disadvantages include wafer heating and low
With set requirements for resolution and thermal expansion, we report findings of beam profile and beam dose at various