In advanced semiconductor industries, the overlay error budget is getting tighter due to shrinkage in technology. To
fulfill the tighter overlay requirements, gaining every nanometer of improved overlay is very important in order to
accelerate yield in high-volume manufacturing (HVM) fabs. To meet the stringent overlay requirements and to overcome
other unforeseen situations, it is becoming critical to eliminate the smallest imperfections in the metrology targets used
for overlay metrology. For standard cases, the overlay metrology recipe is selected based on total measurement
uncertainty (TMU). However, under certain circumstances, inaccuracy due to target imperfections can become the
dominant contributor to the metrology uncertainty and cannot be detected and quantified by the standard TMU. For
optical-based overlay (OBO) metrology targets, mark asymmetry is a common issue which can cause measurement
inaccuracy, and it is not captured by standard TMU.
In this paper, a new calibration method, Archer Self-Calibration (ASC), has been established successfully in HVM fabs
to improve overlay accuracy on image-based overlay (IBO) metrology targets. Additionally, a new color selection
methodology has been developed for the overlay metrology recipe as part of this calibration method. In this study,
Qmerit-calibrated data has been used for run-to-run control loop at multiple devices. This study shows that color filter
can be chosen more precisely with the help of Qmerit data. Overlay stability improved by 10~20% with best color
selection, without causing any negative impact to the products. Residual error, as well as overlay mean plus 3-sigma,
showed an improvement of up to 20% when Qmerit-calibrated data was used. A 30% improvement was seen in certain
electrical data associated with tested process layers.
The performance of overlay metrology as total measurement uncertainty, design rule compatibility, device correlation, and measurement accuracy has been challenged at the 2× nm node and below. The process impact on overlay metrology is becoming critical, and techniques to improve measurement accuracy become increasingly important. We present a methodology for improving the overlay accuracy. A propriety quality metric, Qmerit, is used to identify overlay metrology measurement settings with the least process impacts and reliable accuracies. Using the quality metric, a calibration method, Archer self-calibration, is then used to remove the inaccuracies. Accuracy validation can be achieved by correlation to reference overlay data from another independent metrology source such as critical dimension–scanning electron microscopy data collected on a device correlated metrology hybrid target or by electrical testing. Additionally, reference metrology can also be used to verify which measurement conditions are the most accurate. We provide an example of such a case.
Overlay metrology performance as Total Measurement Uncertainty (TMU), design rule compatibility, device correlation and measurement accuracy are been challenged at 2x nm node and below. Process impact on overlay metrology becoming critical, and techniques to improve measurement accuracy becomes increasingly important. In this paper, we present an innovative methodology for improving overlay accuracy. A propriety quality metric, Qmerit, is used to identify overlay metrology measurement settings with least process impacts and reliable accuracies. Using the quality metric, an innovative calibration method, ASC (Archer Self Calibration) is then used to remove the inaccuracies. Accuracy validation can be achieved by correlation to reference overlay data from another independent metrology source such as CDSEM data collected on DCM (Device Correlated Metrology) hybrid target or electrical testing. Additionally, reference metrology can also be used to verify which measurement conditions are the most accurate. In this paper we bring an example of such use case.
As overlay margins shrink for advanced process nodes, a key overlay metrology challenge is finding the measurement conditions which optimize the yield for every device and layer. Ideally, this setup should be found in-line during the lithography measurements step. Moreover, the overlay measurement must have excellent correlation to the device electrical behavior. This requirement makes the measurement conditions selection even more challenging since it requires information about the response of both the metrology target and device to different process variations. In this work a comprehensive solution for overlay metrology accuracy, used by UMC, is described. This solution ranks the different measurement setups by their accuracy, using Qmerit, as reported by the Archer 500. This ranking was verified to match device overlay using electrical tests. Moreover, the use of Archer Self Calibration (ASC) allows further improvement of overlay measurement accuracy.
In order to fulfill the ever tightening requirements of advanced node overlay budgets, overlay metrology is becoming more and more sensitive to even the smallest imperfections in the metrology target. Under certain circumstances, inaccuracy due to such target imperfections can become the dominant contribution to the metrology uncertainty and cannot be quantified by the standard TMU contributors. In this paper we describe a calibration method that makes the overlay measurement robust to target imperfections without diminishing its sensitivity to the target overlay. The basic assumption of the method is that overlay measurement result can be approximated as the sum of two terms: the accurate overlay and the measurement inaccuracy (independently of the conventional contributors). While the first term (the “real overlay”) is robust it is known that the overlay target inaccuracy depends on the measurement conditions. This dependence on measurement conditions is used to estimate quantitative inaccuracy by means of the overlay quality merit which was described in previous publications. This paper includes the theoretical basis of the method as well as experimental validation.
The semiconductor industry is moving toward 20nm nodes and below. As the Overlay (OVL) budget is getting tighter at these advanced nodes, the importance in the accuracy in each nanometer of OVL error is critical. When process owners select OVL targets and methods for their process, they must do it wisely; otherwise the reported OVL could be inaccurate, resulting in yield loss. The same problem can occur when the target sampling map is chosen incorrectly, consisting of asymmetric targets that will cause biased correctable terms and a corrupted wafer. Total measurement uncertainty (TMU) is the main parameter that process owners use when choosing an OVL target per layer. Going towards the 20nm nodes and below, TMU will not be enough for accurate OVL control. KLA-Tencor has introduced a quality score named ‘Qmerit’ for its imaging based OVL (IBO) targets, which is obtained on the-fly for each OVL measurement point in X & Y. This Qmerit score will enable the process owners to select compatible targets which provide accurate OVL values for their process and thereby improve their yield. Together with K-T Analyzer’s ability to detect the symmetric targets across the wafer and within the field, the Archer tools will continue to provide an independent, reliable measurement of OVL error into the next advanced nodes, enabling fabs to manufacture devices that meet their tight OVL error budgets.
As overlay budget continues to shrink, an improved analysis of the different contributors to this budget is needed. A
major contributor that has never been quantified is the accuracy of the measurements. KLA-Tencor developed a quality
metric, that calculates and attaches an accuracy value to each OVL target. This operation is performed on the fly during
measurement and can be applied without affecting MAM time or throughput. Using a linearity array we demonstrate that
the quality metric identifies targets deviating from the intended OVL value, with no false alarms.
Currently, the performance of overlay metrology is evaluated mainly based on random error contributions such as
precision and TIS variability. With the expected shrinkage of the overlay metrology budget to < 0.5nm, it becomes
crucial to include also systematic error contributions which affect the accuracy of the metrology. Here we discuss
fundamental aspects of overlay accuracy and a methodology to improve accuracy significantly.
We identify overlay mark imperfections and their interaction with the metrology technology, as the main source of
overlay inaccuracy. The most important type of mark imperfection is mark asymmetry. Overlay mark asymmetry leads
to a geometrical ambiguity in the definition of overlay, which can be ~1nm or less. It is shown theoretically and in
simulations that the metrology may enhance the effect of overlay mark asymmetry significantly and lead to metrology
inaccuracy ~10nm, much larger than the geometrical ambiguity. The analysis is carried out for two different overlay
metrology technologies: Imaging overlay and DBO (1st order diffraction based overlay). It is demonstrated that the
sensitivity of DBO to overlay mark asymmetry is larger than the sensitivity of imaging overlay.
Finally, we show that a recently developed measurement quality metric serves as a valuable tool for improving overlay
metrology accuracy. Simulation results demonstrate that the accuracy of imaging overlay can be improved significantly
by recipe setup optimized using the quality metric. We conclude that imaging overlay metrology, complemented by
appropriate use of measurement quality metric, results in optimal overlay accuracy.