193nm immersion lithography is the mainstream production technology for the 22nm half pitch (HP) DRAM manufacturing. Considering multi-patterning as the technology to solve the very low k1 situation in the resolution equation puts extreme pressure on the intra-field overlay, to which mask registration error may be a significant error contributor . The International Technology Roadmap for Semiconductors (ITRS ) requests a registration error below 4 nm for each mask of a multi-patterning set forming one layer on the wafer. For mask metrology at the 22nm HP node, maintaining a precision-to-tolerance (P/T) ratio below 0.25 will be very challenging. Mask registration error impacts intra-field wafer overlay directly and has a major impact on wafer yield. DRAM makers moved several years ago to 6F2 (figure 1, ) cell design and thus printing tilted lines at 15 or 30 degree. Overlay of contact layer over buried line has to be well controlled.
However, measuring mask registration performance accurately on tilted lines was a challenge. KLA Tencor applied the model-based algorithm to enable the accurate registration measurement of tilted lines on the Poly layer as well as the mask-to-mask overlay to the adjacent contact layers. The metrology solution is discussed and measurement results are provided.