As we move to more advanced nodes, the number of Chemical Mechanical Polishing (CMP) steps in semiconductor processing is increasing rapidly. CMP is known to suffer from pattern dependent variation such as dishing, erosion, recess, etc., all of which can cause performance and yield issues. One such yield issue seen in back end of line (BEOL) Cu interconnect CMP processes is pooling. Pooling exists when there is uncleared bulk Cu and/or barrier residue remaining after final CMP step, leading to shorts between neighboring interconnect lines. To detect potential pooling locations on a given design, for a given CMP process, predictive CMP models are needed. Such models can also aid in CMP process and chip design optimizations. In this paper we discuss how a pattern dependent CMP effect that we call the “local neighborhood effect” causes large recesses that can lead to pooling in Cu interconnect CMP processes. We also discuss modeling this effect as part of an advanced predictive CMP modeling system and show how the resulting modeling system accurately predicts Cu pooling on several 14 nm designs.