KEYWORDS: Point spread functions, Digital signal processing, Cameras, Image processing, Field programmable gate arrays, Hough transforms, Data processing, Signal processing, Chemical elements, Binary data
This paper describes an implementation of the Hough Transform (HT) that uses a hybrid-log structure for the main
arithmetic components instead of fixed or floating point architectures. A major advantage of this approach is a reduction
in the overall computational complexity of the HT without adversely affecting its overall performance when compared to
fixed point solutions. The proposed architecture is compatible with the latest FPGA architectures allowing multiple units
to operate in parallel without exhausting the dedicated (but limited) on-chip signal processing resources that can instead
be allocated to other image processing and classification tasks. The solution proposed is capable of performing a real-time
HT on megapixel images at frame rates of up to 25 frames per second using a Xilinx Virtex<sup>TM</sup> architecture.