For Extreme Ultra-violet Lithography (EUVL) targeting at 11nm and beyond design rules, the minimum printable
EUVL multilayer (ML) mask defect size can be as small as 20-25nm. As a result, the defect-free EUVL ML mask blank
fabrication remains the top challenge for EUVL mask. Aspects of this challenge include high quality blank substrate
material (low thermal expansion material) fabrication, substrate polishing, substrate cleaning, blank handling, ML
deposition, and high sensitivity substrate and blank defect inspection. High investment cost and potential low blank yield
due to stringent defect-free requirement can quickly drive up EUVL cost of ownership. It is anticipated, however, the
EUVL ML blank yield can be drastically improved if we can allow a few defects on a ML blank. Utilizing such a
"defective" grade mask blank to fabricate a defect-free EUVL mask requires several defect mitigation schemes during
mask patterning processes. These schemes include modifying mask absorber pattern via repair tool to compensate the
effect of an adjacent ML defect and using absorber pattern to cover the ML defects. In this paper, we focused on the
study and demonstration of using device pattern to cover limited number of blank defects. The steps of this defect
mitigation process include blank fiducial mark patterning, defect location relative to fiducial mark precision
measurement, automated pattern shift solution simulation for a given ML defect map, and precision alignment of the
device pattern to the blank defects during e-beam write. With these steps, we have successfully demonstrated the
coverage of several targeted ML blank defects simultaneously via global device pattern shift.
EUV blank non-flatness results in both out of plane distortion (OPD) and in-plane distortion (IPD) [3-5]. Even for extremely flat masks (~50 nm peak to valley (PV)), the overlay error is estimated to be greater than the allocation in the overlay budget. In addition, due to multilayer and other thin film induced stresses, EUV masks have severe bow (~1 um PV). Since there is no electrostatic chuck to flatten the mask during the e-beam write step, EUV masks are written in a bent state that can result in ~15 nm of overlay error. In this article we present the use of physically-based models of mask bending and non-flatness induced overlay errors, to compensate for pattern placement of EUV masks during the e-beam write step in a process we refer to as E-beam Writer based Overlay error Correction (EWOC). This work could result in less restrictive tolerances for the mask blank non-flatness specs which in turn would result in less blank defects.
Extreme Ultraviolet Lithography (EUVL) masks have residual stress induced by several thin films on low thermal
expansion material (LTEM) substrates. The stressed thin films finally result in convex out-of-plane displacement (OPD)
of several 100s of nm on the pattern side of the mask. Since EUVL masks are chucked on EUVL scanners differently
from on e-beam writer, the mask pattern placement errors (PPE) are necessary to be corrected for to reduce overlay
errors. In this paper, experimental results of pattern placement error correction using standard chrome on glass (COG)
plate will be discussed together with simulations. Excellent agreement with simple bending theory is obtained.
Suitability of the model to compensate for other EUVL-related PPEs due to mask non-flatness will be discussed.