This paper reports a 640x512 SWIR ROIC with 15um pixel pitch that is designed and fabricated using 0.18um CMOS process. Main challenge of SWIR ROIC design is related to input circuit due to pixel area and noise limitations. In this design, CTIA with single stage amplifier is utilized as input stage. The pixel design has three pixel gain options; High Gain (HG), Medium Gain (MG), and Low Gain (LG) with corresponding Full-Well-Capacities of 18.7ké, 190ké and 1.56Mé, respectively. According to extracted simulation results, 5.9é noise is achieved at HG mode and 200é is achieved at LG mode of operation. The ROIC can be programmed through an SPI interface. It supports 1, 2 and 4 output modes which enables the user to configure the detector to work at 30, 60 and 120fps frame rates. In the 4 output mode, the total power consumption of the ROIC is less than 120mW. The ROIC is powered from a 3.3V analog supply and allows for an output swing range in excess of 2V. Anti-blooming feature is added to prevent any unwanted blooming effect during readout.
A 15 μm pixel pitch 640×512 Readout Circuit (ROIC) for MWIR applications is designed and fabricated using 0.18 um CMOS process. The ROIC is implemented using Direct Injection (DI) input stage with programmable pixel gain where maximum full-well-capacity (FWC) is more than 13Mé. All analog current and voltage bias values can be programmed through a digital interface. Additionally, integration time can be programmed with 0.1 µsec resolution by internal timing circuitry. ROIC has 1, 2 and 4 output modes with a frame rate of 120fps at 4 output mode. The design supports IntegrateThen-Read (ITR) and Integrate-While-Read (IWR) modes in snapshot operation. Photodetector reverse bias voltage is controlled by adjusting the bias of the common-gate input stage at the input of DI pixel. An on-chip low-dropout voltage regulator is used to generate the detector common voltage. With 2x2 binning feature, the ROIC can also be used for 30 µm pixel pitch 320x256 photodetector arrays. An Analog-Front-End (AFE) card has been designed to operate the ROIC and to convert analog video output to a 14-bit digital value. This digital video data is handled by external video processor card which supports 1-point and 2-point Non-Uniformity Correction (NUC), histogram equalization, bad pixel replacement and filtering. The ROIC has been extensively tested with a prototype FPA at 77°K. According to these test results, functionality of all modes have been verified and a noise level of 700é is achieved at 4.5Mé FWC.