Cost of ownership of scanners for the manufacturing of front end layers is becoming increasingly expensive. The ability
to quickly switch the production of a layer to another scanner in case it is down is important. This paper presents a
method to match the scanner grids in the most optimal manner so that use of front end scanners in effect becomes
interchangeable. A breakdown of the various components of overlay is given and we discuss methods to optimize the
matching strategy in the fab. A concern here is how to separate the scanner and process induced effects. We look at the
relative contributions of intrafield and interfield errors caused by the scanner and the process. Experimental results of a
method to control the scanner grid are presented and discussed. We compare the overlay results before and after
optimizing the scanner grids and show that the matching penalty is reduced by 20%. We conclude with some thoughts
on the need to correct the remaining matching errors.
As a consequence of the shrinking sizes of the integrated circuit structures, the overlay budget shrinks as well. Overlay is
traditionally measured with relatively large test structures which are located in the scribe line of the exposure field, in the
four corners. Although the performance of the overlay metrology tools has improved significantly over time it is
questionable if this traditional method of overlay control will be sufficient for future technology nodes. For advanced
lithography techniques like double exposure or double patterning, in-die overlay is critical and it is important to know
how much of the total overlay budget is consumed by in-die components.
We reported earlier that small overlay targets were included directly inside die areas and good performance was
achieved. This new methodology enables a wide range of investigations. This provides insight into processes which
were less important in the past or not accessible for metrology. The present work provides actual data from productive
designs, instead of estimates, illustrating the differences between the scribe line and in-die registration and overlay.
The influence of the pellicle on pattern placement on mask and wafer overlay is studied. Furthermore the registration
overlay error of the reticles is correlated to wafer overlay residuals.
The influence of scanner-induced distortions (tool to tool differences) on in-die overlay is shown.
Finally, the individual contributors to in-die-overlay are discussed in the context of other overlay contributors. It is
proposed to use in-die overlay and registration results to derive guidelines for future overlay and registration
specifications. It will be shown that new overlay correction schemes which take advantage of the additional in-die
overlay information need to be considered for production.