In this paper, the performances and limitations related to the high frequency noise properties of SOI MOSFET Technology are investigated. The study is conducted through powerful analytical noise parameters calculation, experimental data, and physical based drift-diffusion noise modeling. In addition to the noise generated by the inner part of the active device, the influence of access resistances, overlap/fringing capacitances, tunneling gate current are discussed qualitatively and quantitatively. The paper ends up with a critical discussion related to the "New Era SOI Technology" to come and its influence on the noise performance.
This paper is intended to describe on one part theoretical results issued from a physical noise modeling and on the other part the noise performance of Fully Depleted (FD) SOI MOSFET of 0.15 μm gate length. In the theoretical part, the physical noise model is applied to two distinct applications; first to study the influence of the microscopic diffusion noise sources definition (located in the channel device) on the noise performance, second to check the concept of un-correlated noise sources, if one uses an input noise voltage and output drain noise current representation. In the experimental part, both bias and frequency dependences of the measured noise performances of the 0.15 μm gate length fully depleted (FD) SOI MOSFET (OKI technology) are presented, and a comparison with the results issued from the physical noise model is proposed.
Parameters limiting the improvement of high frequency characteristics for deep sub micron MOSFETs (bulk and SOI) with the downscaling process of the channel gate length are analyzed experimentally. The high frequency performances of MOSFETs are generally characterized by the specific transit frequencies ft, f<sub>max</sub>. ft and/or f<sub>max</sub>, what is the good factor of merit to quantify the performance of a transistor ft, which corresponds to the transit frequency (when the gain is equal to 1) of the current gain, is an interesting criterion for high speed digital applications (speed and high swing) while f<sub>max</sub>, which is defined as the transit frequency of the unilateral power gain is the best criterion for analogue microwave applications (amplifier, oscillators, etc.). f<sub>max</sub> corresponds also to the transit frequency of the maximum available power gain (MAG) that is a realistic parameter of the optimization of microwave amplifiers. Moreover, at the opposite of ft, f<sub>max</sub> includes the contribution of the gate resistance, which degrades the high frequency noise performance.
The different contributions of the extrinsic and intrinsic parameters on these transit frequencies will be detailed. We will support this analysis by experimental results obtained from several deep sub micron SOI and bulk MOSFETs technologies. We will focus essentially this presentation on the different technological ways of optimization on the high frequency performance of MOSFETs and particularly concerning its high frequency noise characteristics.