AGIPD is a hybrid pixel detector developed by DESY, PSI, and the Universities of Bonn and Hamburg. It is targeted for use at the European XFEL, a source with unique properties: a train of up to 2700 pulses is repeated at 10 Hz rate. The pulses inside a train are ≤100fs long and separated by 220 ns, containing up to 1012 photons of 12.4 keV each. The readout ASICs with 64 x 64 pixels each have to cope with these properties: Single photon sensitivity and a dynamic range up to ⪆104 photons/pixel in the same image as well as storage for as many as possible images of a pulse train for delayed readout, prior to the next train. The high impinging photon flux also requires a very radiation hard design of sensor and ASIC, which uses 130 nm CMOS technology and radiation tolerant techniques. The signal path inside a pixel of the ASIC consists of a charge sensitive preamplifier with 3 individual gains, adaptively selected by a subsequent discriminator. The preamp also feeds to a correlated double sampling stage, which writes to an analogue memory to record 352 frames. It is random-access, so it can be used most efficiently by overwriting bad or empty images. Encoded gain information is stored to a similar memory. Readout of these memories is via a common charge sensitive amplifier in each pixel, and multiplexers on four differential ports. Operation of the ASIC is controlled via a command interface, using 3 LVDS lines. It also serves to configure the chip’s operational parameters and timings.
The European XFEL will generate extremely brilliant pulses of X-rays organized in pulse trains consisting of 2700 pulses <100 fs long, with <1012 photons, and with a 220 ns spacing. The pulse trains are running at a 10Hz repetition rate. The detector to be used under these conditions will have to face several challenges: the dynamic range has to cover the detection of single photons and extend up to <104 photons/pixel/pulse in the same image, framing rates of 4.5 MHz (220 ns) are required in order to record one image per pulse, and as many images as possible have to be recorded during the pulse trains. Due to the high flux, the detector will have to withstand a dose up to 1GGy integrated over 3 years. To meet these challenges a consortium, consisting of Deutsches Elektronensynchrotron (DESY), Paul-Scherrer-Institut (PSI), University of Hamburg and University of Bonn, is developing the Adaptive Gain Integrating Pixel Detector (AGIPD). It is a hybrid-pixel detector, featuring a charge integrating amplifier with dynamic gain switching to cope with the extended dynamic range, and an analogue on-pixel memory for image storage at the required 4.5 MHz frame rate. The readout chip consists of 64×64 pixels of (200μm)2, 8×2 of these readout chips are bump-bonded to a monolithic silicon sensor to form the basic module with 512 × 128 pixels. 4 of these modules are stacked to form a quadrant of the 1k ×1k detector system. Each quadrant is independently moveable in order to adjust a central hole, needed for the direct beam to pass through. Special designs are employed for both the sensor and the readout chip to withstand the integrated dose for 3 years.
A hybrid pixel detector based on the concept of simultaneous charge integration and photon counting will be presented.
The second generation of a counting and integrating X-ray prototype CMOS chip (CIX) has been operated with different
direct converting sensor materials (CdZnTe and CdTe) bump bonded to its 8x8 pixel matrix. Photon counting devices
give excellent results for low to medium X-ray fluxes but saturate at high rates while charge integration allows the
detection of very high fluxes but is limited at low rates by the finite signal to noise ratio. The combination of both signal
processing concepts therefore extends the resolvable dynamic range of the X-ray detector. In addition, for a large region
of the dynamic range, where counter and integrator operate simultaneously, the mean energy of the detected X-ray
spectrum can be calculated. This spectral information can be used to enhance the contrast of the X-ray image. The
advantages of the counting and integrating signal processing concept and the performance of the imaging system will be
reviewed. The properties of the system with respect to dynamic range and sensor response will be discussed and
examples of imaging with additional spectral information will be presented.
DEPMOSFET based Active Pixel Sensor (APS) matrix devices, originally
developed to cope with the challenging requirements of the XEUS Wide
Field Imager, have proven to be a promising new imager concept for a
variety of future X-ray imaging and spectroscopy missions like Simbol-X. The devices combine excellent energy resolution, high speed readout and low power consumption with the attractive feature of random accessibility of pixels. A production of sensor prototypes with 64 x 64 pixels with a size of 75 μm x 75 μm each has recently been finished at the MPI semiconductor laboratory in Munich. The devices are built for row-wise readout and require dedicated control and signal processing electronics of the CAMEX type, which is integrated together with the sensor onto a readout hybrid. A number of hybrids incorporating the most promising sensor design variants has been built, and their performance has been studied in detail. A spectroscopic resolution of 131 eV has been measured, the readout noise is as low as 3.5 e- ENC. Here, the dependence of readout noise and spectroscopic resolution on the device temperature is presented.
The concept of an Active Pixel Sensor (APS) based on the
integrated detector/amplifier structure DEPFET (DEpleted P-channel
Field Effect Transistor) has been developed to cope with the
challenging requirements of the XEUS Wide Field Imager. The
DEPFET-APS combines high energy resolution, fast readout, and random accessible pixels allowing the application of flexible readout modes. First prototypes of DEPFET-based Active Pixel Sensors with a 64 x 64 pixel format and 75 μm x 75 μm pixel area have been produced at the MPI semiconductor laboratory. The APS is read out row by row, i.e. the pixel signals of one row are processed in parallel by a 64 channel CMOS amplifier/multiplexer chip of the CAMEX type. The addressing of one row of pixels for readout and reset is done by two control chips of the SWITCHER type fabricated in a high-voltage CMOS technology. The processing time for one row is of the order of a few micro-seconds. APS operation, the control and data acquisition system are described, and first experimental results are presented.