Mid-infrared detection with semiconductor based pixel arrays attracted constant research interest over the past years. Remaining challenges for intersubband detectors are high device performance at elevated temperatures in combination with cost effective scalability to large pixel counts needed for applications in remote sensing and high resolution infrared imaging.
In this field, quantum cascade detectors may offer promising advantages such as photovoltaic room temperature operation at a designable operation wavelength with compatibility to stable material systems and growth technology.
We present a high performance InGaAs/InAlAs quantum cascade detector design suitable for pixel devices. The design is based on a vertical optical transition and resonant tunneling extraction. The 20 period active region is optimized for a high device resistance and thereby high detectivity up to room temperature. The pixels are fully compatible with standard processing technology and material growth to provide scalability to large pixel counts. An enhanced quantum cascade detector simulator is used for design optimization of the resistance and extraction efficiency while maintaining state of the art responsivity. The device is thermo-compression bonded to a custom read out integrated circuit with substrate bottom side illuminated pixels utilizing a metal grating coupling scheme. The operation wavelength is designed to align with the strong CO2 absorption around 4.3µm. A room temperature responsivity of 16mA/W and a detectivity of 5∙10^7 cm√Hz/W was achieved in good agreement with our simulation results. Device packaging and thermo-electric cooling in an N2 purged 16 pin TO-8 housing has been investigated.
A glass optical waveguide process has been developed for fabrication of electro-optical circuit boards (EOCB). Very thin glass panels with planar integrated single-mode waveguides can be embedded as a core layer in printed circuit boards for high-speed board-level chip-to-chip and board-to-board optical interconnects over an optical backplane. Such singlemode EOCBs will be needed in upcoming high performance computers and data storage network environments in case single-mode operating silicon photonic ICs generate high-bandwidth signals . The paper will describe some project results of the ongoing PhoxTroT project, in which a development of glass based single-mode on-board and board-to-board interconnection platform is successfully in progress. The optical design comprises a 500 μm thin glass panel (Schott D263Teco) with purely optical layers for single-mode glass waveguides. The board size is accommodated to the mask size limitations of the fabrication (200 mm wafer level process, being later transferred also to larger panel size). Our concept consists of directly assembling of silicon photonic ICs on cut-out areas in glass-based optical waveguide panels. A part of the electrical wiring is patterned by thin film technology directly on the glass wafer surface. A coupling element will be assembled on bottom side of the glass-based waveguide panel for 3D coupling between board-level glass waveguides and chip-level silicon waveguides. The laminate has a defined window for direct glass access for assembling of the photonic integrated circuit chip and optical coupling element. The paper describes the design, fabrication and characterization of glass-based electro-optical circuit board with format of (228 x 305) mm<sup>2</sup>.
Integration of MEMS and MOEMS requires very compact packages with short interconnects which are found in 3D
packages. We will give an overview on assembly methods like chip-to-chip, chip-to-wafer and wafer-to-wafer. For the
variety of applications different interconnection methods are shown: reflow soldering, transient liquid phase bonding and
transient liquid phase soldering, thermocompression and thermosonic bonding as well as sintering of silver paste or new
materials like nanosponge.
It has been previously published how, using two separate Vertical-Cavity-Surface-Emitting-Lasers (VCSELs), a miniature laser-Doppler interferometer can be made for quasi-three-dimensional displacement measurements. For the use in consumer applications as PC-mice, the manufacturing costs of such sensors need to be minimized. This paper describes the fabrication of a low-cost laser-self-mixing sensor by integrating silicon and GaAs components using flip-chip technology. Wafer-scale lens replication on GaAs wafers is used to achieve integrated optics. In this way a sensor was realized without an external lens and that uses only a single GaAs VCSEL crystal, while maintaining its quasi-three-dimensional sensor capabilities.
An important issue for white ultra high power LEDs is the
generation of a homogeneous light with high efficiency and a
good color rendering index. Different from hot light sources
LEDs do not emit the whole range of visible wavelengths. Only
a certain wavelength with a limited full width at half maximum
is emitted. Therefore a combination of wavelengths must be
used to satisfy the human eye for white light. The CIE
chromaticity diagram (Fig. 1) shows, that several combinations
of wavelengths let the brain realize white light. Already the
combination of two wavelengths (e.g. cyan and red or blue and
yellow) let us think, that the source is white, if this wavelengths
hit our receptors. This is completely different, if the light is
illuminating an object. The reflection spectra of this object,
which is crucial for our color feeling about this object, can not
be stimulated in the whole range. For example a red stop sign,
which is absorbing all wavelength excepting red, will absorb
the blue and yellow light from our "white" light source and due
to the missing red, the sign seems to be dark grey or black.
The design of an efficient LED package, with a high luminous flux, stable wavelength emission and long lifetime needs
a good knowledge about the principles of light emitting diodes, thermal and thermomechanical design and the
interaction of materials. The technology development under cost aspects is a general constraint. The following work will
combine known aspects from different research fields with own developments to a complete design for an ultra high
brightness LED package. Topics as material selection, thermal and electrical interconnections, as well as color stable
wavelength conversion will be discussed.
Assembly of single mode laser diodes requires a post bond alignment accuracy of less than 1 μm. The implementation of passive alignment in optoelectronics packaging is still a challenge. A low cost approach to achieve such high precision alignment is using the flip chip self alignment mechanism in combination with micro-mechanical stops. In order to prove that this approach is feasible test vehicles were designed and fabricated. This paper presents the concept of passive alignment pursued, the experimental setup and results thereof. The design of the test vehicles is described including the bump design as well as bumping and flip chip assembly process.
Au/Sn solder bumps are commonly used for flip chip assembly of optoelectronic and RF devices. They allow a fluxless assembly which is required to avoid contamination at optical interfaces. Flip chip assembly experiments were carried out using as plated Au/Sn bumps without prior bump reflow. An RF and reliability test vehicles comprise a GaAs chip which was flip chip soldered on a silicon substrate. Temperature cycling tests with and without underfiller were performed and the results are presented. The different failure modes for underfilled and non-underfilled samples were discussed and compared. Additional reliability tests were performed with flip chip bonding by gold thermocompression for comparison. The test results and the failure modes are discussed in detail.
A variety of flip chip technologies are available today which differ in bumping material, substrate type, pad metallization and joining method. They are found in packages as well as on multichip modules and directly flip chip bonded on the board. Components including flip chip like bal grid arrays and chip size packages are introduced. Flip chip is the most favored assembly technology for high frequency applications due to the small parasitic of the short bump interconnect. High performance packages for optoelectronic devices using self-alignment during a fluxless reflow soldering are shown as well as the integration of MMICs. High density multichip modules have been fabricated for large pixel defectors of a nuclear detector with eight Chips and more than 46000 I/Os with an acceptable yield. Flip chip technology is a very flexible assembly method for different applications. Variations of the bump structure can be used for MEMS packaging as well and it was demonstrated by the assembly of a thin membrane to form an absolute pressure sensor with a vacuum enclosure. For different packaging requirements the appropriate technology should be chosen very carefully. An overview will be given for different bumping and flip chip joining methods suitable for high volume production as well as for prototyping. Wafer bumping methods will focus on electro less deposition of nickel/gold as well as on electroplating of gold, SnPb and AuSn solders. For rapid prototyping single chip bumping methods are described. Examples of different joining methods - soldering, adhesive bonding and thermocompression bonding - will be shown.
We report the first solder-bonding of low-cost silicon absolute pressure sensors. The goal of the work is to solder a pressure sensor wafer and a CMOS wafer containing the signal conditioning circuitry together face to face under vacuum. The result is a very flat capacitive absolute pressure sensor which can be used in harsh environments for automotive, medical, barometric, and other applications. We successfully demonstrated this approach using sensor wafers with micromachined silicon membranes and CMOS wafers without signal conditioning circuitry. Solder frames surrounding the membrane are electroplated on the sensor wafer. Different solder materials such as Au/Sn and SnPb were examined. Characterization of the hermetic prototypes in a pressure chamber showed a sensitivity of 0.8 fF/mbar, in good agreement with finite (FE) element simulations. With special regard to the sensitivity of the sensor a quadratic membrane, a rectangular membrane and a square membrane with a boss, all with an area of 2.25 mm<SUP>2</SUP>, were compared using FE analysis. The rectangular membrane has the largest sensitivity.