Polycrystalline silicon (p-Si) thin film transistors (TFTs) were fabricated using a high temperature process that included solid phase crystallization (SPC) and dry thermal oxidation with excimer laser annealing (ELA). Raman spectroscopy, X-ray diffraction and transmission electron microscopy analyses showed that the ELA process improved the quality of p-Si films markedly. The p-Si TFTs exhibited higher performance than the SPC p-Si TFTs. The field effect mobility for n-type self-aligned TFT was (formula available in paper). The longitudinal junction diffusion length of the p-Si TFTs was shorter than that of the SPC p-Si TFTs. This is favorable for fine design rules. If optimization of amorphous silicon (a-Si) deposition and SPC conditions enables the grains of p-Si films to grow larger than the channel length and the positions of the grain boundaries are controlled, this process will produce great scaling rule merits such as single-grain Si TFTs. This fabrication process is consistent with the high temperature p-Si TFT development trend towards using large substrates, low temperatures, and fine design rules. High temperature p-Si TFTs are expected to be used in LSI circuits as silicon-on-insulator (SOI) devices in the future.