In order to improve the performance of infrared system, both infrared detector and readout circuit must be packaged together and work at low temperature. A great deal of research has been done on the readout circuits of infrared detectors internationally, but there are some universal disadvantages such as unstable performance at low temperature, excessive noise of output signal and oscillation at low temperature. To improve the performance of infrared detector system, A design with a cascode CTIA and phase self compensation capacitor before CDS is developed, which is able to ensure that the circuit has a larger phase margin and a stable operating status at low temperature. Through simulation analysis, the compensation capacitance is benefit to reduce output overshoot voltage from 76 mV to 4.9 mV, the signal stability time can be decreased to 1/10 of the former. The performance of the readout circuit is tested after design and tapeout, the output noise of circuit becomes lower, the value is less than 0.5 mV. The circuit can work normally from room temperature to low temperature 77K.The signal swing is greater than 2 V. After being interconnected with IR detector, the readout circuit can work well under low temperature 77 k, which overcomes the defect of oscillation phenomenon at low temperature. The system’s anti-interference ability is also improved obviously.
At present, most uncooled infrared detectors circuits consist of the corresponding blind pixel detector, which increases the complexity of uncooled infrared detector, and the performance of the readout circuits is not ideal in practical applications. In order to achieve high performance of the readout circuit for uncooled infrared detectors, a kind of readout circuit based on current mirror has been designed in this paper. The readout circuit is composed of current mirror input part, capacitor feedback transimpedance amplifier (CTIA) and correlated double sampling (CDS) output circuit. Transconductance amplifier CTIA with capacitance negative feedback is used in the circuit and it consists of three integral capacitors, thus the circuit can realize different magnifications. The CDS N SF (source follow) and P SF are adopted as the circuit’s output, the output swing can easily be greater than 2V. In average, the CDS N SF and P SF’s power consumption is very low. So the total power consumption of 160 line circuit is about 100 mW. The non-uniformity of circuit has been obviously improved by reasonable parameter settings. In the test, the non-uniformity of the readout circuit has reached 1%. The other test results of total power consumption and the output amplitude also agree with simulation results. When the readout circuit and uncooled infrared detector are connected, the infrared signal can be well read out. the device has good noise characteristics and the NETD(noise equivalent temperature difference) is near 80mK. When the integration time is 20μs, the whole device’s response is about 15mV/K.
Low-impedance long-wave infrared detectors (the wavelength longer than 10 microns) have very important applications in cryogenic aim detection, super-distance detection, anti-jamming target identify and so on. Therefore the research in the field of infrared detector technology is of importance. At present, no low-impedance photoconductive detectors are integrated with CMOS circuit. To design low-temperature CMOS circuit being fit for low impedance infrared photoconductive detector and realize high performance IR imaging, using differential amplifier with symmetrical positive and negative power is necessary, the low-resist detector is connected between an input and grounding, the corresponding low resistance is connected between another input and grounding, a larger feedback resistor is used between negative input and output, this structure can effectively solve the matching problem of low-impedance and high-impedance CMOS. In addition, the noise voltage from VBIAS terminal can be effectively reduced by increasing the ratio of the bias resistor and the detector resistance. The whole circuit is designed two grade. The first grade is adopted bridge input structure, this structure is fit for low impedance detector. The positive amplifying method is applied in second grade . The first grade feedback resistance is designed 1M ohm, the circuit is supplied by ±1.5V. The testing showed that the circuit can work well when it connects with low-impedance infrared photoconductive detector at the liquid nitrogen low temperature. The magnification is up to 30000 times, 3dB bandwidth is more than 4kHz, the equivalent input noise is near 1.5 micron volts. This circuit has perfectly solved the matching problem between high impedance CMOS circuit and low impedance detector.
Due to VLWIR (very long wavelength infrared) signals are often very weak, it is about 1uV, little disturb can affect the performance of the total detector system very much. In order to achieve high Signal-to-Noise ratio, it is expected that the circuit can be designed to work as close as to the HgCdTe IR detector. That is to say the circuit can work normally at low temperature 77K even more low. On the other hand, according to the characteristics of a Very Long Wavelength HgCdTe photoconductive detector, its resistance is about 25Ω~50Ω, CMOS circuit for this low resistance is very difficult. In this paper, A new kind of circuit for this low resistance detector is designed. The operation principle and noise of the circuit are analyzed. The noise model of the circuit is given. An expression for its equivalent input noise is derived. This circuit for long wave photoconductive detector was implemented in 0.5μm CMOS process. The size of twenty-cell chip is 3mm×4mm and its noise performance is tested. The test result indicate that this circuit can work normally at low temperature 77K, the equivalent input noise is less than 1uV. This circuit is suit to many kinds of low resistance detector. The voltage gain is more than 10000. The linearity has been reached 90%. Finally, it can work normally either by ±2 or by ±1.5 voltage power supply. The bandwidth is more than 5Khz.
In order to make medium-long wave HgCdTe IR detector work normally it
must be in zero bias voltage, the differential input current preamplifier can easily make
HgCdTe IR detector biased at zero voltage. Because IR signals are often very weak, then little
disturb can affect the performance of the total detector system very much. In order to achieve
high Signal-to-Noise ratio, it is expected that the differential input current preamplifier can be
designed to work as close as to the HgCdTe IR detector. That is to say the preamplifier can
also work normally at 77K. In this paper, a high-performance low-noise differential input
current preamplifier working at cryogenic temperature for HgCdTe IR detectors is designed.
Since a differential input folded-cascode structure has been used in the preamplifier's design,
it makes that the gain of single stage amplifier can arrive 60dB, the circuit uses high resistant
poly as feedback resistance so that 40 MΩ feedback resistance can be integrated on chip at
temperature 77k ,which can directly transforms IR detector's current to voltage, avoiding the
additional noise by using exterior resister. The preamplifier's noise characteristics were
analyzed and the methods for decreasing noise were proposed. This differential input current
preamplifier was implemented in 0.5μm CMOS process. The size of eight-cell chip is
3mm×1.9mm. The test result shows that the current preamplifier has good performance at the
temperature of 77K. Within the bandwidth of 3.3KHz, the total output voltage noise is 120uV,
the equivalent total input noise voltage is 3PA, the equivalent input noise current is
0.03pA/Hz1/2@100Hz. The preamplifier power consumption is less than 1mW at 77K. When
the input current is less than 10nA, its linearity has been reached 99%. This circuit can work
normally at temperature between 300K to 77K and it can be used for several bands of IR
detector. Finally, it can work normally either by ±2 or by ±1.5 voltage power supply. This current preamplifier has been successfully applied in the signal readout of HgCdTe IR
detectors for infrared imaging.
The paper mainly investigate the abnormal occurrence of no Photo current response at performance test of
detector after coupling of circuit and chip. At the beginning, we find that detector module is out of the way, while
preamplifier circuit and photosenstive chip operate well separately. Then we carry on various experiments such as
I-V measurement of chip, simulated magnification test of circuit, replace of high resistence chip, at various
background measurement and so on. All these experiments and theoretical calculation demonstrate that the large
background dark current resulting in the circuit's overload is the cause of detector's no Photo current response. By
means of adding optical filter and aperture slot to reduce the background radiation, consequently the reduction of
background dark current, and the detector finally works well without the circuit's overload.
An integrated receiver channel for a pulsed time-of-flight (TOF) laser rangefinder has been designed. Pulsed TOF laser
range finding devices using a laser diode transmitter can achieve millimeter-level distance measurement accuracy in a
measurement range of several tens of meters to non-cooperative targets. The amplifier exploits the regulated cascade
(RGC) configuration as the input-stage, thus achieving as large effective input trans-conductance as that of Si Bipolar or
GaAs MESFET. The RGC input configuration isolates the input parasitic capacitance including photodiode capacitance
from the bandwidth determination better than common-gate TIA. To enlarge the bandwidth, inductive peaking
technology has been adopted. An active inductor (MOS-L) is used instead of spiral inductor in CMOS process. An R-2R
resistor ladder is inserting between per-amplifier and post-amplifier as the variable attenuator for digital gain control
purpose. The gain-bandwidth of a basic differential pair with resistive load is not large enough for broad band operation.
A circuit solution to improve both gain and bandwidth of an amplifying stage is proposed. Traditional and modified
Cherry-Hooper amplifiers are discussed and the cascading of several stages to constitute the post-amplifier is designed.
The fully integrated one-chip solution is designed with Cadence IC design platform. The simulation result shows the
bandwidth of the trans-impedance amplifier is 215MHz with the presence of a 2pF input capacitor and 5pF load
capacitor. And the maximum trans-impedance gain is 136dB. The walk error is less than 1ns in 1:1000 dynamic range.
The responsive time is less than 2.2ns.