We present finite difference thermal modeling to predict temperature distribution, heat flux, and thermal resistance inside lasers with different waveguide geometries. We provide a quantitative experimental and theoretical comparison of the thermal behavior of shallow-ridge (SR) and buried-heterostructure (BH) lasers. We investigate the influence of a split heat source to describe p-layer Joule heating and nonradiative energy loss in the active layer and the heat-sinking from top as well as bottom when quantifying thermal impedance. From both measured values and numerical modeling we can quantify the thermal resistance for BH lasers and SR lasers, showing an improved thermal performance from 50K/W to 30K/W for otherwise equivalent BH laser designs.
In this paper a generic monolithic photonic integration technology platform and tunable laser devices for gas sensing applications at 2 μm will be presented. The basic set of long wavelength optical functions which is fundamental for a generic photonic integration approach is realized using planar, but-joint, active-passive integration on indium phosphide substrate with active components based on strained InGaAs quantum wells. Using this limited set of basic building blocks a novel geometry, widely tunable laser source was designed and fabricated within the first long wavelength multiproject wafer run. The fabricated laser operates around 2027 nm, covers a record tuning range of 31 nm and is successfully employed in absorption measurements of carbon dioxide. These results demonstrate a fully functional long wavelength photonic integrated circuit that operates at these wavelengths. Moreover, the process steps and material system used for the long wavelength technology are almost identical to the ones which are used in the technology process at 1.5μm which makes it straightforward and hassle-free to transfer to the photonic foundries with existing fabrication lines. The changes from the 1550 nm technology and the trade-offs made in the building block design and layer stack will be discussed.
A new photonic integration technique is presented, based on the use of an indium phosphide membrane on top of a silicon chip. This can provide electronic chips (CMOS) with an added optical layer (IMOS) for resolving the communication bottleneck. A major advantage of InP is the possibility to integrate passive and active components (SOAs, lasers) in a single membrane. In this paper we describe progress achieved in both the passive and active components. For the passive part of the circuit we succeeded to bring the propagation loss of our circuits close to the values obtained with silicon; we achieved propagation loss as low as 3.3 dB/cm through optimization of the lithography and the introduction of C60 (fullerene) in an electro resist. Further we report the smallest polarisation converter reported for membrane waveguides ( <10 μm) with low-loss (< 1 dB from 1520- 1550 nm), > 95% polarisation conversion efficiency over the whole C-band and tolerant fabrication. We also demonstrate an InP-membrane wavelength demultiplexer with a loss of 2.8 dB, a crosstalk level of better than 18 dB and a uniformity over the 8 channels of better than 1.2 dB. For the integration of active components we are testing a twin guide integration scheme. We present our design based on optical and electrical simulations and the fabrication techniques.
Application Specific Photonic Integrated Circuits (ASPICs) are considered key elements to make photonic systems or subsystems cheap and ubiquitous. ASPICs still are several orders of magnitude more expensive than their microelectronic counterpart: ASICS, which has restricted their application to a few niche markets. A novel approach in photonic integration is emerging that will reduce the R&D costs of ASPICs by more than an order of magnitude. It will bring the application of ASPICs that integrate complex and advanced photonic functionality on a single chip within reach for a large number of small and larger companies and initiate a breakthrough in the application of Photonic ICs. In this paper the process is explained. A significant number of designs has been realized the last 4 years, for a variety of applications in telecoms, datacoms, medical and sensing, from parties all over the world.
Integrated spot size converters (SSCs) are key components for efficient coupling between Photonic Integrated Circuits (PICs) and fibre-arrays. We report a compact SSC which is suitable for integration into dense arrays with a pitch down to 25 μm and compatible with our generic InP-based platform technology, which supports integration of SOAs and Electro Optical Modulators with a range of passive components. The small pitch supports coupling tens of on-chip optical waveguide ports to fiber arrays via a low-loss dielectric interposer chip. The density allows the design of a customized optical bus between the InP PIC and the interposer chip. The dielectric chip may simply expand to the pitch of a fiber array but also contain low-loss passive circuitry like delay-lines, high Q-filters and multiplexers. The latter enables the formation of a hybrid integration platform with our InP-based technology. Efficient coupling is obtained by adiabatically transforming the sub-micron modes of the InP waveguides to the 3 μm diameter mode of the interposer. We tested our SSCs by coupling to a lensed fibre with a mode field diameter of 2.5 μm. Coupling losses were found to be as low as 0.6 dB per fiber chip coupling for device lengths of a few 100 μm. We also measured the crosstalk from one input port to output ports adjacent to the targeted output port. We present simple design rules for reducing the crosstalk to neighbouring output ports below -50 dB. The quality and uniformity of the SSCs is demonstrated by fabrication of an 8 x 8 AWG demultiplexer between two SSC arrays placed at input and output ports. We measured an insertion loss between fibres of 4 dB for the central channel of the AWG, which is record low for an InP-based device.