Prof. Jacky Huang Profile

Prof. Jacky Huang

Technical Manager at Taiwan Semiconductor Manufacturing Co Ltd

SPIE Involvement:

Author

Publications (20)

Proceedings Article | 28 March 2017 Paper

Paper

Application of advanced diffraction based optical metrology overlay capabilities for high-volume manufacturing

Kai-Hsiung Chen, Guo-Tsai Huang, Hung-Chih Hsieh, Wei-Feng Ni, S. M. Chuang, T. K. Chuang, Chih-Ming Ke, Jacky Huang, Shiuan-An Rao, Aysegul Cumurcu Gysen, Maxime d'Alfonso, Jenny Yueh, Pavel Izikson, Aileen Soco, Jon Wu, Tjitte Nooitgedagt, Jeroen Ottens, Yong Ho Kim, Martin Ebert

Proceedings Volume 10145, 1014528 (2017) https://doi.org/10.1117/12.2257894

KEYWORDS: Overlay metrology, Metrology, High volume manufacturing, Scatterometry, Diffraction, Optical metrology, Lithography, Process control, Optical lithography, Time metrology, Image registration, Target acquisition, Semiconducting wafers

Read Abstract +

Proceedings Article | 2 April 2014 Paper

Paper

Improving on-product performance at litho using integrated diffraction-based metrology and computationally designed device-like targets fit for advanced technologies (incl. FinFET)

Kai-Hsiung Chen, GT Huang, KS Chen, C. Hsieh, YC Chen, CM Ke, TS Gau, YC Ku, Kaustuve Bhattacharyya, Jacky Huang, Arie den Boef, Maurits v. d. Schaar, Martijn Maassen, Reinder Plug, Youping Zhang, Steffen Meyer, Martijn van Veen, Chris de Ruiter, Jon Wu, Hua Xu, Tatung Chow, Charlie Chen, Eric Verhoeven, Pu Li, Paul Hinnen, Greet Storms, Kelvin Pao, Gary Zhang, Christophe Fouquet, Takuya Mori

Proceedings Volume 9050, 90500S (2014) https://doi.org/10.1117/12.2047098

KEYWORDS: Overlay metrology, Metrology, Semiconducting wafers, Back end of line, Scanners, Diffraction, Front end of line, Process control, Etching

Read Abstract +

Proceedings Article | 5 April 2012 Paper

Paper

Quality indicators of image-based overlay

Yen-Liang Chen, Jacky Huang, Rita Lee, Chen-Ming Wang, Chih-Ming Ke, Tsai-Sheng Gau

Proceedings Volume 8324, 83241C (2012) https://doi.org/10.1117/12.917995

KEYWORDS: Overlay metrology, Artificial intelligence, Image quality, Quality measurement, Image processing, Tolerancing, Process control, Semiconducting wafers, Optical alignment, Metrology

Read Abstract +

Proceedings Article | 3 April 2012 Paper

Paper

Evaluation of a novel ultra small target technology supporting on-product overlay measurements

Henk-Jan Smilde, Arie den Boef, Michael Kubis, Martin Jak, Mark van Schijndel, Andreas Fuchs, Maurits van der Schaar, Steffen Meyer, Stephen Morgan, Jon Wu, Vincent Tsai, Cathy Wang, Kaustuve Bhattacharyya, Kai-Hsiung Chen, Guo-Tsai Huang, Chih-Ming Ke, Jacky Huang

Proceedings Volume 8324, 83241A (2012) https://doi.org/10.1117/12.916382

KEYWORDS: Overlay metrology, Semiconducting wafers, Metrology, Diffraction gratings, Diffraction, Standards development, Reticles, Lithography, Scatterometry, Physics

Read Abstract +

Proceedings Article | 20 April 2011 Paper

Paper

Accuracy of diffraction-based and image-based overlay

Chih-Ming Ke, Guo-Tsai Huang, Jacky Huang, Rita Lee

Proceedings Volume 7971, 79711E (2011) https://doi.org/10.1117/12.880037

KEYWORDS: Overlay metrology, Semiconducting wafers, Metrology, Critical dimension metrology, Transmission electron microscopy, Lithography, Scanners, Light sources, Very large scale integration, Electron microscopes

Read Abstract +

There is no overlay standard in the world. For critical dimension (CD), we may use the VLSI standard or programmed pitch offsets to determine the CD accuracy or CD sensitivity. Programmed overlay offsets can provide relatively accurate sub-nanometer level overlay splits but it is only on a single layer and does not contain layer-to-layer process variations. The splits of scanner magnification can check the trend of overlay sensitivity but it cannot provide the exact value of overlay offsets. Transmission electron microscopes (TEM) can be used as a final overly error verification tool. However, TEM sample preparation for after-development-inspection (ADI) will introduce even more sample distortion errors. Therefore, unlike CD metrology, there is no clean and systematic way to verify the accuracy of overlay metrology. These technical barriers necessitate matching diffraction-based overlay and image-based overlay, especially for sub-nanometer point-to-point matching requirement. In this paper, we compare the correlation of ADI to after-etch-inspection (AEI) by using image-based box-in-box overlay measurement and diffraction-based overlay measurement on the same wafer. The ADI-to-AEI overlay data consistency plays a key role for lithography overlay APC success and AEI overlay should be treated as the final standard for overlay accuracy. We found that process-induced asymmetric profiles of overlay marks will lead to ADI-to-AEI overlay bias. This bias is proportional to the degree of profile asymmetry and different color/wavelength have different sensitivity to this ADI-to-AEI bias. Our experimental results show that the ADI-to-AEI overlay data bias can indeed be significantly improved by selecting the color/wavelength with minimum sensitivity to the asymmetry profile. These results make us believe that overlay metrology recipe setup is quite critical no matter for image-based overlay or diffraction-based overlay. Otherwise, problematic overlay data will be taken into APC feedback loop and lead to wrong overlay correction.

Proceedings Article | 29 March 2011 Paper

Paper

Litho process control via optimum metrology sampling while providing cycle time reduction and faster metrology-to-litho turn around time

K.-H. Chen, Jacky Huang, W.-T. Yang, C.-M. Ke, Y.-C. Ku, John Lin, Kaustuve Bhattacharyya, Evert Mos, Mir Shahrjerdy, Maurits van der Schaar, Steffen Meyer, Spencer Lin, Jon Wu, Sophie Peng, Albert Li, Nikki Chang, Roy Chu, Cathy Wang

Proceedings Volume 7971, 797105 (2011) https://doi.org/10.1117/12.879218

KEYWORDS: Semiconducting wafers, Metrology, Overlay metrology, Time metrology, Process control, Lithography, Tin, Feedback control, Scanners, Optical lithography

Read Abstract +

SPIE Journal Paper | 1 January 2011

New approaches for scatterometry-based metrology for critical distance and overlay measurement and process control

Kaustuve Bhattacharyya, Noelle Wright, Maurits van der Schaar, Arie den Boef, Paul Hinnen, Mir Shahrjerdy, Vivien Wang, Spencer Lin, Cathy Wang, Chih-Ming Ke, Jacky Huang, Willie Wang

JM3, Vol. 10, Issue 1, 013013, (January 2011) https://doi.org/10.1117/12.10.1117/1.3532076

KEYWORDS: Overlay metrology, Semiconducting wafers, Metrology, Scanners, Critical dimension metrology, Birefringence, Distance measurement, Process control, Lithography, Scanning electron microscopy

Read Abstract +

Proceedings Article | 2 April 2010 Paper

Paper

A paradigm shift in scatterometry-based metrology solution addressing the most stringent needs of today as well as future lithography

C. Ke, Victor Shih, Jacky Huang, L. Chen, Willie Wang, G. Huang, W. Yang, Sophia Wang, C. Liang, H. Liu, H. Lee, L. Terng, T. Gau, John Lin, Kaustuve Bhattacharyya, Maurits van der Schaar, Noelle Wright, Marc Noot, Mir Shahrjerdy, Vivien Wang, Spencer Lin, Jon Wu, Sophie Peng, Gavin Liu, Wei-Shun Tzeng, Jim Chen, Andreas Fuchs, Omer Adam, Cathy Wang

Proceedings Volume 7638, 76383P (2010) https://doi.org/10.1117/12.853318

KEYWORDS: Overlay metrology, Metrology, Semiconducting wafers, Scanners, Back end of line, Lithography, 3D metrology, Finite element methods, Scatterometry, Critical dimension metrology

Read Abstract +

Proceedings Article | 2 April 2010 Paper

Paper

Detection of lateral CD shift with scatterometry on grating structures in production layout

Jacky Huang, Jiarui Hu, Willie Wang, Ya-Ping Lee, Chih-Ming Ke, Tsai-Sheng Gau

Proceedings Volume 7638, 76381Q (2010) https://doi.org/10.1117/12.848522

KEYWORDS: Overlay metrology, Scatterometry, Reflectivity, Critical dimension metrology, Laser marking, Metrology, Double patterning technology, Analytical research, Optical alignment, Semiconducting wafers

Read Abstract +

Proceedings Article | 11 December 2009 Paper

Paper

A sophisticated metrology solution for advanced lithography: addressing the most stringent needs of today as well as future lithography

Victor Shih, Jacky Huang, Willie Wang, G. T. Huang, H. L. Chung, Alan Ho, W. T. Yang, Sophia Wang, Chih-Ming Ke, L. J. Chen, C. R. Liang, H. H. Liu, H. J. Lee, L. G. Terng, T. S. Gau, John Lin, Kaustuve Bhattacharyya, Maurits van der Schaar, Noelle Wright, Mir Shahrjerdy, Vivien Wang, Spencer Lin, Jon Wu, Sophie Peng, Dennis Chang, Cathy Wang, Andreas Fuchs, Omer Adam, Karel van der Mast

Proceedings Volume 7520, 75201A (2009) https://doi.org/10.1117/12.837353

KEYWORDS: Overlay metrology, Semiconducting wafers, Metrology, Scanners, Lithography, Back end of line, Metals, Scatterometry, Front end of line, Signal to noise ratio

Read Abstract +

Proceedings Article | 24 March 2009 Paper

Paper

A scatterometry based CD metrology solution for advanced nodes, including capability of handling birefringent layers with uniaxial anisotropy

Chih-Ming Ke, Jimmy Hu, Willie Wang, Jacky Huang, H. Chung, C. R. Liang, Victor Shih, H. H. Liu, H. J. Lee, John Lin, Y. Fan, Tony Yen, Noelle Wright, Ruben Alvarez Sanchez, Wim Coene, Marc Noot, Kiwi Yuan, Vivien Wang, Kaustuve Bhattacharyya, Karel van der Mast

Proceedings Volume 7272, 72723R (2009) https://doi.org/10.1117/12.814909

KEYWORDS: Anisotropy, Semiconducting wafers, Scatterometry, Finite element methods, Critical dimension metrology, Birefringence, Absorption, Refractive index, Carbon, Lithography

Read Abstract +

Proceedings Article | 23 March 2009 Paper

Paper

Evaluation of a new metrology technique to support the needs of accuracy, precision, speed, and sophistication in near-future lithography

Chih-Ming Ke, Jimmy Hu, Willie Wang, Jacky Huang, H. Chung, C. Liang, Victor Shih, H. Liu, H. Lee, John Lin, Y. Fan, Kaustuve Bhattacharyya, Maurits van der Schaar, Noelle Wright, Kiwi Yuan, Vivien Wang, Cathy Wang, Spencer Lin, Mir Shahrjerdy, Andreas Fuchs, Karel van der Mast

Proceedings Volume 7272, 72720A (2009) https://doi.org/10.1117/12.814860

KEYWORDS: Overlay metrology, Metrology, Scatterometry, Semiconducting wafers, Critical dimension metrology, Lithography, Finite element methods, Photomasks, Scanners, Double patterning technology

Read Abstract +

Proceedings Article | 1 December 2008 Paper

Paper

A comprehensive look at a new metrology technique to support the needs of lithography performance in near future

Jimmy Hu, Chih-Ming Ke, Willie Wang, Jacky Huang, H. L. Chung, C. R. Liang, Victor Shih, H. Liu, H. J. Lee, L. G. Terng, Y. D. Fan, Maurits van der Schaar, Kiwi Yuan, Vivien Wang, Cathy Wang, Mir Shahrjerdy, Andreas Fuchs, Kaustuve Bhattacharyya, Karel van der Mast

Proceedings Volume 7140, 71400N (2008) https://doi.org/10.1117/12.807998

KEYWORDS: Overlay metrology, Metrology, Lithography, Semiconducting wafers, Scatterometry, Photomasks, Feedback control, Optical lithography, Scanners

Read Abstract +

Proceedings Article | 22 March 2008 Paper

Paper

Sub-nanometer pitch calibration and data quality evaluation methodology

Chih-Ming Ke, Yu-hsi Wang, Jaffee Huang, Jimmy Hu, Jacky Huang, Tsai-Sheng Gau, Burn Lin

Proceedings Volume 6922, 69220I (2008) https://doi.org/10.1117/12.775410

KEYWORDS: Metrology, Critical dimension metrology, Scanning electron microscopy, Calibration, Semiconducting wafers, Process control, Silicon, Photomasks, Chemical species, Scatterometry

Read Abstract +

Average CD of CD SEM and scatterometry CD (OCD) have been adopted for advanced CD control. The advantages and disadvantages of these two CD metrologies have been well discussed. The target of CD uniformity (CDU) for advanced technology has been driven to 1 nm, i.e. about three and half the size of a silicon atom, which is 0.29 nm. In the real production environment, engineers need to face sub-nanometer (< 1 nm) CD variations and do the necessary process corrections to meet the 1-nm CDU requirement. In other words, advanced CD process control has already been in the world of atomic scale. It turns out that methodology to ensure the accuracy of sub-nanometer CD has become essential for advanced CD control. In this paper, we introduced a methodology to produce 0.25, 0.5, and 1 nm programmed pitch offsets through mask design. These offsets are attainable with current process capability. Pitch offsets instead of line/space width offsets were used because the pitch is relatively process insensitive. The pitch has already been widely used as a CD SEM magnification calibration standard, e.g. Hitachi m-scale 240-nm pitch and VLSI 100-nm pitch standards. We produced large and small pitch splits to meet different magnification linearity requirements. We also used optical CD to verify the programmed pitch offset. Using the raw spectrum of OCD, systematic pitch signal changes in 0.25-nm steps can be detected, ensuring that 0.25-nm pitch offset standards are meaningful. Interestingly, 0.25 nm is smaller than the 0.29-nm Si atom. We also used this standard wafer to do the sampling size or data quality evaluation for different CD SEM measurement methodologies, e.g. 150K by 150K or 80K by 35K magnifications that in turn dictates the sample size. Pitch sensitivity is strongly related to the sampling size and line-edge roughness (LER). For example, 0.25-nm pitch sensitivity needs a larger sampling size than those of 0.5-nm and 1- nm pitch sensitivities. By means of this standard wafer, we can easily quantify metrology quality as well as choose the right metrology and sampling size for advanced process control.

Proceedings Article | 5 April 2007 Paper

Paper

OCD metrology by floating n/k

Shinn-Sheng Yu, Jacky Huang, Chih-Ming Ke, Tsai-Sheng Gau, Burn Lin, Anthony Yen, Lawrence Lane, Vi Vuong, Yan Chen

Proceedings Volume 6518, 65183C (2007) https://doi.org/10.1117/12.713341

KEYWORDS: Metrology, Semiconducting wafers, Critical dimension metrology, Lithography, Thin films, Scanning electron microscopy, Process control, Deposition processes, Roentgenium, Error analysis

Read Abstract +

Proceedings Article | 5 April 2007 Paper

Paper

In-chip overlay metrology of 45nm and 55nm processes

Y. S. Ku, C. H. Tung, Y. P. Li, H. L. Pang, C. M. Ke, Y. H. Wang, D. C. Huang, N. P. Smith, L. Binns

Proceedings Volume 6518, 65182V (2007) https://doi.org/10.1117/12.713075

KEYWORDS: Overlay metrology, Semiconducting wafers, Calibration, Data modeling, Mathematical modeling, Wafer testing, Reticles, Tolerancing, Error analysis, Process control

Read Abstract +

Proceedings Article | 24 March 2006 Paper

Paper

ArF scanner performance improvement by using track integrated CD optimization

Jacky Huang, Shinn-Sheng Yu, Chih-Ming Ke, Timothy Wu, Yu-Hsi Wang, Tsai-Sheng Gau, Dennis Wang, Allen Li, Wenge Yang, Araki Kaoru

Proceedings Volume 6152, 615228 (2006) https://doi.org/10.1117/12.656104

KEYWORDS: Critical dimension metrology, Semiconducting wafers, Sensors, Calibration, Error analysis, Scanners, Infrared sensors, Metrology, Wafer-level optics, Integrated optics

Read Abstract +

SPIE Journal Paper | 1 October 2005

Thin-film optimization strategy in high numerical aperture optical lithography, part 1: principles

Shinn-Sheng Yu, Burn Lin, Anthony Yen, Chih-Ming Ke, Te-Chih Huang, Bang-Chein Ho, Chun-Kuang Chen, Tsai-Sheng Gau, Hung-Chang Hsieh, Yao-Ching Ku

JM3, Vol. 4, Issue 04, 043003, (October 2005) https://doi.org/10.1117/12.10.1117/1.2137967

KEYWORDS: Thin films, Wave propagation, Magnetism, Optical lithography, Critical dimension metrology, Interfaces, Scanners, Absorption, Lithography, Multilayers

Read Abstract +

Proceedings Article | 10 May 2005 Paper

Paper

Application of 3D scatterometry to contacts and vias at 90nm and beyond

Jacky Huang, Kelly Barry, Chih-Ming Ke, Burn Lin, Allen Li

Proceedings Volume 5752, (2005) https://doi.org/10.1117/12.601023

KEYWORDS: Semiconducting wafers, Scatterometry, Critical dimension metrology, Metrology, 3D metrology, Scanning electron microscopy, Etching, 3D applications, Cadmium, Inspection

Read Abstract +

Proceedings Article | 24 May 2004 Paper

Paper

90-nm lithography process characterization using ODP scatterometry technology

Chih-Ming Ke, Shinn-Sheng Yu, Yu-Hsi Wang, Yu-Jun Chou, Jeng-Horng Chen, Bih-Huey Lee, Hong-Yuan Chu, Hua-Tai Lin, Tsai-Sheng Gau, Chih-Hsiang Lin, Yao-Ching Ku, Burn Lin, Jacky Huang, J. Hsu, Victor Liu, Dave Hetzer, Lip Yap, Wenge Yang, Kaoru Araki

Proceedings Volume 5375, (2004) https://doi.org/10.1117/12.536123

KEYWORDS: Critical dimension metrology, Scanning electron microscopy, Semiconducting wafers, Transmission electron microscopy, Metrology, Scatterometry, Finite element methods, Process control, Lithography, Wafer-level optics

Read Abstract +

Showing 5 of 20 publications

SIGN IN TO:

View contact details

UPDATE YOUR PROFILE

Is this your profile? Update it now.

Sign into your SPIE.org account

Don’t have a profile and want one?

Create an account on SPIE.org

Advertisement

Advertisement