Dr. Jangho Shin
Senior field apps engineer
SPIE Involvement:
Author
Area of Expertise:
Semiconductor Processing , Optical Lithography , Alignment , Overlay Metrology , Computational lithography , Defect inspection metrology
Profile Summary

Jangho (Jerry) Shin is presently a senior field apps engineer at ASML Korea. He was a researcher/manager at Samsung semiconductor R&D and is a Senior member of SPIE. Dr. Shin received his PhD in electrical and computer engineering from the University of Wisconsin at Madison in 2003.
Publications (19)

Proceedings Article | 22 February 2021 Poster + Paper
Proc. SPIE. 11613, Optical Microlithography XXXIV
KEYWORDS: Lithography, Metrology, Calibration, Physics, Signal processing, Machine learning, Computational lithography, Optical proximity correction

Proceedings Article | 28 March 2017 Presentation + Paper
Proc. SPIE. 10145, Metrology, Inspection, and Process Control for Microlithography XXXI
KEYWORDS: Electron beam lithography, Metrology, Defect detection, Metals, Scanners, Inspection, Scanning electron microscopy, Photomasks, Critical dimension metrology, Semiconducting wafers

Proceedings Article | 24 March 2017 Presentation + Paper
Proc. SPIE. 10147, Optical Microlithography XXX
KEYWORDS: Metrology, Lithographic illumination, Data modeling, Calibration, Image processing, Scanners, Laser scanners, Process control, Finite element methods, Photomasks, Computational lithography, 3D scanning, Critical dimension metrology, Semiconducting wafers

SPIE Journal Paper | 1 July 2010
JM3 Vol. 9 Issue 03

Proceedings Article | 2 April 2010 Paper
Proc. SPIE. 7638, Metrology, Inspection, and Process Control for Microlithography XXIV
KEYWORDS: Semiconductors, Lithography, Metrology, Optical lithography, Data modeling, Scanners, Inspection, Optical alignment, Semiconducting wafers, Overlay metrology

Showing 5 of 19 publications
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