The Large Size Telescopes, LSTs, located at the center of the Cherenkov Telescope Array, CTA, will be sensitive
for low energy gamma-rays. The camera on the LST focal plane is optimized to detect low energy events based
on a high photon detection efficiency and high speed electronics. Also the trigger system is designed to detect
low energy showers as much as possible. In addition, the camera is required to work stably without maintenance
in a few tens of years. In this contribution we present the design of the camera for the first LST and the status
of its development and production.
NectarCAM is a camera designed for the medium-sized telescopes of the Cherenkov Telescope Array (CTA) covering the central energy range 100 GeV to 30 TeV. It has a modular design based on the NECTAr chip, at the heart of which is a GHz sampling Switched Capacitor Array and 12-bit Analog to Digital converter. The camera will be equipped with 265 7-photomultiplier modules, covering a field of view of 7 to 8 degrees. Each module includes the photomultiplier bases, High Voltage supply, pre-amplifier, trigger, readout and Thernet transceiver. Events recorded last between a few nanoseconds and tens of nanoseconds. A flexible trigger scheme allows to read out very long events. NectarCAM can sustain a data rate of 10 kHz. The camera concept, the design and tests of the various subcomponents and results of thermal and electrical prototypes are presented. The design includes the mechanical structure, the cooling of electronics, read-out, clock distribution, slow control, data-acquisition, trigger, monitoring and services. A 133-pixel prototype with full scale mechanics, cooling, data acquisition and slow control will be built at the end of 2014.
The Cherenkov Telescope Array (CTA) project aims to implement the world’s largest next generation of Very High Energy gamma-ray Imaging Atmospheric Cherenkov Telescopes devoted to the observation from a few tens of GeV to more than 100 TeV. To view the whole sky, two CTA sites are foreseen, one for each hemisphere. The sensitivity at the lowest energy range will be dominated by four Large Size Telescopes, LSTs, located at the center of each array and designed to achieve observations of high red-shift objects with the threshold energy of 20 GeV. The LST is optimized also for transient low energy sources, such as Gamma Ray Bursts (GRB), which require fast repositioning of the telescope. The overall design and the development status of the first LST telescope will be discussed.
On-chip passives, such as inductors, transformers, are key components in the design of RF building blocks when using VLSI technologies. Most of the time of the design cycle is used in the simulation of passives, trying to obtain the maximum performance. Recently, work on modelling of passives has been directed to pursuit fast computation algorithms due to the need to handle several passives in a complete RF circuit. However, small attention has been paid in the optimization of passives. The work presented tries to fill this gap. The algorithm is based on three steps: the split of the magnetic and electric modelling problem based in a PEEC description; a model order reduction, based on plausible arguments; and the use of analytical formulae to keep scalability. Fast computation is achieved thanks to both the separation of the magnetic and electric problem, and the model order reduction. By keeping an analytical formulation, the optimization of the layout for minimum losses is driven by a physical algorithm, instead of a mathematical one. The tool has been checked with experimental data from inductors fabricated in different VLSI technologies, showing its possibilities in the design of RF building blocks.
This work presents a simple differentially BPSK receiver front-end using a novel schema without the need of an explicit carrier recovery system. The main principle of operation is the conversion of the incoming BPSK signal into an ASK signal having the same modulation pattern. Two versions of the system have been designed. One is intended to work at the 433.92 MHz ISM band and the other at 2 GHz frequency band. Accordingly, two prototypes of the system core, the BPSK to ASK converter circuit, have been implemented and tested. First a hybrid version for the low frequency operation and, second a multi chip module (MCM) for the 2 GHz frequency band. The system performance has been evaluated using Agilent Technologies Advanced Design System (ADS) platform. The ability to jointly perform system, circuit and EM simulations and co-simulations is the main advantage of this design tool. Obtained results indicate that modulation rates up to 20 Mbits/s for the hybrid version and up to 80 Mbits/s for the MCM version can be reached.