Silicon monolithically Optoelectronic Integrated Circuit (OEIC) designed in standard CMOS process has been gradually
applied. But Spice models of opticalelectronic devices such as photodetector can not be provided by IC manufactories in
OEIC design. A novel Spice model of photodetector is introduced for compatible-design of OEIC in this paper. An
N+/N-Well/P-Sub photodetector in standard CMOS process is described. The model of CMOS photodetector is
completely based on Hspice EDA design software. It includes optical current, dark current, junction capacitor, series
resistor, parallel resistor, and even noise characteristic. A four-terminal network structure is utilized to take the place of
the photodetector in the model. The whole model can be easily applied to OEIC design as a subcircuit. At 780nm
wavelength, the characteristics of the N+/N-Well/P-Sub photodiode fabricated in 0.5μm CMOS process are simulated
with the Spice model and tested. With a reverse bias of 2.5V, the measured and simulated responsivity is both about
0.25A/W, which indicates the availability of the model. Finally, the compatible-design of OEIC used for optical pickup
unit in optical storage system has been accomplished with the novel photodetector model.
Three kinds of structure photodetectors, N+/N-Well/P-Substrate, P+/N-Well/P-Substrate and finger N+/N-Well/P-Substrate, have been fabricated in CSMC 0.5μm CMOS process. The characteristics of different photodetectors are comparatively tested. The N+/N-Well/P-Substrate photodetector is choosed for construction of novel Spice model and fabrication of OEIC chip, considered about both high responsivity and good response speed. A novel Spice model of photodetector is introduced for compatible-design of OEIC. At 780nm and 2.5V reverse bias, the simulated responsivity based on the Spice model is 0.251A/W, close to the measured value 0.253A/W. Finally, a full CMOS monolithic OEIC is successfully accomplished with a gain of 38.1mV/μW in 780nm for optical-disc signal pickup.
Silicon photodetector is easy to be integrated with all kinds of Silicon IC to get monolithically OEIC. And the
photodetector array is also widely applied. A kind of
CMOS-process-compatible N+/N-Well/P-Sub photodetector and its
array are analyzed in this paper. Depended on the basic
time-dependent equations of photodetctor and analyzed by
Laplace transform method, the intrinsic frequency response characteristic is numerically calculated. The effect of reverse
bias voltage on spectral responsivity is also discussed. The photodetector is fabricated in 0.5μm CMOS process. At
780nm wavelength incident light, the measured and calculated responsivity are 0.253A/W and 0.251A/W, respectively.
The variety of measured responsivity with bias voltage is about 1.8mA/(W•V). At a reverse voltage of 5V, the maximum
dark current is 0.148nA. And the junction capacitance and -3dB frequency are also measured. The crosstalk factor of
photodetector with PN junction isolation and 5μm isolated space in CMOS technology is less than 5%.
Silicon photodetector can be integrated with all kinds of Silicon circuits to get monolithic OEIC. A CMOS-process-compatible silicon double-photodetector with structures of P+/N-well and N-well/P-substrate, called PD1 and PD2 respectively, is designed in this paper. The theoretical absolute spectral response and response speed of this double-photodetector are calculated and analyzed. Simulation results in 0.5um standard CMOS process show that the responsivity of the double-photodetector is above 0.2A/W from 400 to 900nm wavelength range without ARC (Anti-Reflection-Coating). Both the effects of the insulated medium layers (SiO2 and Si3N4) in CMOS process and reverse voltage on spectral responsivity are also discussed. When the optical window area is 16.54μmx16.54μm2, the capacitance of PD1 is about 100fF at a reverse voltage of 2.5V. Yet the capacitance of PD2 is almost 1/10 of PD1. With a load-resistor of 50Ω, the response speeds of PD1, PD2 and double-photodetector are 0.628, 2.04 and 2.05ns at 650nm wavelength (corresponding bandwidth about 276MHz, 85MHz and 84.7MHz), respectively. Finally, the co-design of Monolithic OEIC is also discussed. A full CMOS monolithic OEIC for optical-disc signal pickup is designed with this double-detector.