Lucky imaging technology is a post-processing technique for eliminating the influence of atmospheric turbulence in astronomical images to obtain high-resolution images. Reconstruction usually realized by using a desktop computer system. However, this post-processing method based on CPU can’t meet the real-time requirements of some astronomical observers. Based on a prototype of a FPGA-based lucky imaging system developed with our laboratory, a technical solution of lucky imaging technology based on Gigabit Ethernet is presented in this paper. The original short exposure images can input into the FPGA-based lucky imaging system via a Gigabit Ethernet interface. Some functional modules related to data transmission through Gigabit Ethernet are designed, and the lucky imaging processing and VGA display modules in the prototype system are transplanted. After all these works, a new lucky imaging processing system which is based on Gigabit Ethernet, has been built. This paper will firstly introduce the design methods and the implementation techniques of the Ethernet receiving module, FIFO module, DDR3 module, and the transplantation methods for the s election module, registration module, superposition module, and display module. The observed short exposure images are sent to the FPGA system by an image workstation via Gigabit Ethernet. The software in the workstation is developed in C#. The programming method is also introduced in this paper. Experiments show that compared with the old prototype system, the total time for processing 1,000 short exposure images is reduced from 42 seconds to about 10 seconds, and the real-time performance of the new system is improved.
Proc. SPIE. 11189, Optical Metrology and Inspection for Industrial Applications VI
KEYWORDS: Target detection, Detection and tracking algorithms, Data storage, Image processing, Video, Image acquisition, Field programmable gate arrays, Video surveillance, Image storage, Algorithm development
In order to improve the real-time and portability of the moving target detection and tracking (MTDT) system, a compact FPGA-based MTDT system is built in this paper by using the parallel computing and flexible programming of Field Programmable Gate Array (FPGA). In order to realize the detection and tracking of moving targets on resource -constrained FPGA, some MTDT algorithms is analyzed firstly, and appropriate modifications were made without changing the basic principles to make it adapt to the limited logical resources of the Xilinx Spartan -6 series of FPGA chip selected in this design. Then the FPGA system is composed of four units: the image acquisition unit, the image storage unit, the image pre-and post- processing unit and the image display unit. Two image difference methods, an inter-frame and a background difference method, are implemented in the system. Finally, the moving target can be directly indicated on a video graphics array (VGA) displayer in the image display unit. The test results show that the system can detect and track a single target in real time in various resolutions at various frame rates, i.e. VGA @30fps and 15fps, 720p @15fps.