Dr. John L. Sturtevant
Director of Product Development at D2S
SPIE Involvement:
Fellow status | Conference Program Committee | Conference Chair | Conference Co-Chair | Author | Editor | Instructor
Publications (95)

Proceedings Article | 2 January 2019
Proc. SPIE. 10809, International Conference on Extreme Ultraviolet Lithography 2018
KEYWORDS: Photomasks, Extreme ultraviolet, Source mask optimization, Resolution enhancement technologies, Tantalum, SRAF, Lithography, Logic, Image enhancement, Image processing

Proceedings Article | 19 March 2018
Proc. SPIE. 10583, Extreme Ultraviolet (EUV) Lithography IX
KEYWORDS: Metals, Optical proximity correction, Scanners, Extreme ultraviolet lithography, Manufacturing, Overlay metrology, Bridges, Optical lithography, Logic, Photomasks

Proceedings Article | 16 October 2017
Proc. SPIE. 10451, Photomask Technology
KEYWORDS: Optical proximity correction, Wavefronts, Extreme ultraviolet, Scanners, Photomasks, Error analysis, Extreme ultraviolet lithography, Manufacturing, 3D modeling, Tolerancing

Proceedings Article | 28 September 2017
Proc. SPIE. 10446, 33rd European Mask and Lithography Conference

Proceedings Article | 28 March 2017
Proc. SPIE. 10147, Optical Microlithography XXX
KEYWORDS: Error analysis, Optical lithography, Visualization, Extreme ultraviolet, Nanoimprint lithography, Tolerancing, Bridges, Process engineering, Visual process modeling, Computational lithography, Process modeling, Etching, Feature extraction, Instrument modeling, Calibration, Critical dimension metrology

Proceedings Article | 24 March 2017
Proc. SPIE. 10147, Optical Microlithography XXX
KEYWORDS: Photomasks, Optical proximity correction, Data modeling, Metrology, 3D modeling, Semiconducting wafers, Photoresist materials, Calibration, Wafer-level optics, Image processing, Scanners

Showing 5 of 95 publications
Conference Committee Involvement (18)
Design-Process-Technology Co-optimization for Manufacturability XII
28 February 2018 | San Jose, California, United States
Design-Process-Technology Co-optimization for Manufacturability XI
1 March 2017 | San Jose, California, United States
Design-Process-Technology Co-optimization for Manufacturability X
24 February 2016 | San Jose, California, United States
Design-Process-Technology Co-optimization for Manufacturability IX
25 February 2015 | San Jose, California, United States
Design-Process-Technology Co-optimization for Manufacturability VIII
26 February 2014 | San Jose, California, United States
Showing 5 of 18 published special sections
Course Instructor
SC121: Practical Process Design for Microlithography
The microlithography process is critical to the successful manufacture of integrated circuits. Control of the critical dimension (CD) of the device is paramount to producing devices that meet design specification. Eight critical process categories that control feature size are considered. This course looks at each category and discusses the impact that parameter variation has on the lithography process, on device yield and on final device performance. Emphasis is placed on the chemical and physical relationships within the lithography process.This course will consider lithography methods and process tuning appropriate for production lithography now that production is moving below historical limits.This is an excellent opportunity to get advice and specific direction on resist processing.
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